llvm-6502/CODE_OWNERS.TXT
Evan Cheng 7c6694946d Clarify my code ownership
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 19:31:48 +00:00

92 lines
1.8 KiB
Plaintext

This file is a list of the people responsible for ensuring that patches for a
particular part of LLVM are reviewed, either by themself or by someone else.
They are also the gatekeepers for their part of LLVM, with the final word on
what goes in or not.
The list is sorted by surname and formatted to allow easy grepping and
beautification by scripts. The fields are: name (N), email (E), web-address
(W), PGP key ID and fingerprint (P), description (D), and snail-mail address
(S).
N: Joe Abbey
E: jabbey@arxan.com
D: LLVM Bitcode (lib/Bitcode/* include/llvm/Bitcode/*)
N: Evan Cheng
E: evan.cheng@apple.com
D: ARM target, parts of code generator not covered by someone else
N: Eric Christopher
E: echristo@gmail.com
D: Debug Information
N: Greg Clayton
D: LLDB
N: Peter Collingbourne
D: libclc
N: Hal Finkel
E: hfinkel@anl.gov
D: BBVectorize and the PowerPC target
N: Doug Gregor
D: Clang Frontend Libraries
N: Tobias Grosser
D: Polly
N: James Grosbach
E: grosbach@apple.com
D: MC layer
N: Howard Hinnant
D: libc++
N: Justin Holewinski
E: jholewinski@nvidia.com
D: NVPTX Target (lib/Target/NVPTX/*)
N: Anton Korobeynikov
E: anton@korobeynikov.info
D: Exception handling, Windows codegen, ARM EABI
N: Benjamin Kramer
E: benny.kra@gmail.com
D: DWARF Parser
N: Ted Kremenek
D: Clang Static Analyzer
N: Sergei Larin
E: slarin@codeaurora.org
D: VLIW Instruction Scheduling, Packetization
N: Chris Lattner
E: sabre@nondot.org
W: http://nondot.org/~sabre/
D: Everything not covered by someone else
N: John McCall
E: rjmccall@apple.com
D: Clang LLVM IR generation
N: Jakob Olesen
D: Register allocators and TableGen
N: Chad Rosier
E: mcrosier@apple.com
D: MS-inline asm, fast-isel
N: Nadav Rotem
E: nrotem@apple.com
D: Loop Vectorizer
N: Duncan Sands
E: baldrick@free.fr
D: DragonEgg
N: Andrew Trick
E: atrick@apple.com
D: Instruction Scheduling