Matt Arsenault 6e5862cb8c R600/SI: Fix assertion on sign extend of 3 vectors ...

This was trying to create an MVT with 3x vectors which
created an invalid EVT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222942 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-28 22:51:38 +00:00

..

AsmParser

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

InstPrinter

R600/SI: Change how DS offsets are printed

2014-10-10 22:16:07 +00:00

MCTargetDesc

R600: Fix assert on empty function

2014-11-13 20:07:40 +00:00

TargetInfo

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AMDGPU.h

R600/SI: Add SIFoldOperands pass

2014-11-21 22:06:37 +00:00

AMDGPU.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

AMDGPUAlwaysInlinePass.cpp

Reapply: R600: Make sure to inline all internal functions

2014-11-03 19:49:05 +00:00

AMDGPUAsmPrinter.cpp

…

AMDGPUAsmPrinter.h

…

AMDGPUCallingConv.td

…

AMDGPUFrameLowering.cpp

…

AMDGPUFrameLowering.h

…

AMDGPUInstrInfo.cpp

…

AMDGPUInstrInfo.h

…

AMDGPUInstrInfo.td

R600/SI: Combine min3/max3 instructions

2014-11-14 20:08:52 +00:00

AMDGPUInstructions.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

AMDGPUIntrinsicInfo.cpp

…

AMDGPUIntrinsicInfo.h

…

AMDGPUIntrinsics.td

…

AMDGPUISelDAGToDAG.cpp

R600/SI: Get rid of FCLAMP_SI pseudo

2014-11-13 19:49:04 +00:00

AMDGPUISelLowering.cpp

R600/SI: Use ZeroOrNegativeOneBooleanContent

2014-11-26 21:23:15 +00:00

AMDGPUISelLowering.h

R600: Factor i64 UDIVREM lowering into its own fuction

2014-11-15 01:07:53 +00:00

AMDGPUMachineFunction.cpp

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AMDGPUMachineFunction.h

Reapply "R600: Add new intrinsic to read work dimensions"

2014-10-14 20:05:26 +00:00

AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPUPromoteAlloca.cpp

R600: Don't promote allocas when one of the users is a ptrtoint instruction

2014-10-31 20:52:04 +00:00

AMDGPURegisterInfo.cpp

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AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

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AMDGPUSubtarget.cpp

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AMDGPUSubtarget.h

R600: Remove unused define

2014-11-07 20:45:00 +00:00

AMDGPUTargetMachine.cpp

R600/SI: Add SIFoldOperands pass

2014-11-21 22:06:37 +00:00

AMDGPUTargetMachine.h

This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively

2014-11-13 09:26:31 +00:00

AMDGPUTargetTransformInfo.cpp

Fix broken doxygen annotations, NFC

2014-11-12 18:25:06 +00:00

AMDILCFGStructurizer.cpp

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CaymanInstructions.td

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CMakeLists.txt

R600/SI: Add SIFoldOperands pass

2014-11-21 22:06:37 +00:00

EvergreenInstructions.td

R600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs

2014-11-02 23:46:54 +00:00

LLVMBuild.txt

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

Makefile

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

Processors.td

…

R600ClauseMergePass.cpp

…

R600ControlFlowFinalizer.cpp

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R600Defines.h

…

R600EmitClauseMarkers.cpp

…

R600ExpandSpecialInstrs.cpp

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R600InstrFormats.td

R600/SI: Start implementing an assembler

2014-11-14 14:08:00 +00:00

R600InstrInfo.cpp

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R600InstrInfo.h

…

R600Instructions.td

Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.

2014-11-26 00:46:26 +00:00

R600Intrinsics.td

…

R600ISelLowering.cpp

R600/SI: Use ZeroOrNegativeOneBooleanContent

2014-11-26 21:23:15 +00:00

R600ISelLowering.h

…

R600MachineFunctionInfo.cpp

…

R600MachineFunctionInfo.h

…

R600MachineScheduler.cpp

…

R600MachineScheduler.h

…

R600OptimizeVectorRegisters.cpp

…

R600Packetizer.cpp

…

R600RegisterInfo.cpp

…

R600RegisterInfo.h

…

R600RegisterInfo.td

…

R600Schedule.td

…

R600TextureIntrinsicsReplacer.cpp

…

R700Instructions.td

…

SIAnnotateControlFlow.cpp

…

SIDefines.h

…

SIFixSGPRCopies.cpp

R600/SI: Only use one DEBUG()

2014-11-25 21:03:22 +00:00

SIFixSGPRLiveRanges.cpp

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SIFoldOperands.cpp

R600/SI: Add SIFoldOperands pass

2014-11-21 22:06:37 +00:00

SIInsertWaits.cpp

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SIInstrFormats.td

Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.

2014-11-26 00:46:26 +00:00

SIInstrInfo.cpp

R600/SI: Add an s_mov_b32 to patterns which use the M0RegClass

2014-11-21 22:31:46 +00:00

SIInstrInfo.h

R600/SI: Implement areMemAccessesTriviallyDisjoint

2014-11-19 00:01:31 +00:00

SIInstrInfo.td

R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction

2014-11-21 22:31:44 +00:00

SIInstructions.td

Revert r222746: That commit did not update any tests and caused two R600

2014-11-25 10:50:41 +00:00

SIIntrinsics.td

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SIISelLowering.cpp

R600/SI: Fix assertion on sign extend of 3 vectors

2014-11-28 22:51:38 +00:00

SIISelLowering.h

R600/SI: Combine min3/max3 instructions

2014-11-14 20:08:52 +00:00

SILoadStoreOptimizer.cpp

R600/SI: Emit s_mov_b32 m0, -1 before every DS instruction

2014-11-21 22:31:44 +00:00

SILowerControlFlow.cpp

Removing a variable that is initialized but never read. The original author has been alerted to the warning, in case this variable is meant to be used. Fixes -Werror builds in the meantime.

2014-11-24 14:03:16 +00:00

SILowerI1Copies.cpp

R600/SI: Create e64 versions of and/or/xor in SILowerI1Copies

2014-11-26 18:18:28 +00:00

SIMachineFunctionInfo.cpp

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SIMachineFunctionInfo.h

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SIRegisterInfo.cpp

R600/SI: Fix allocating flat_scr_lo / flat_scr_hi

2014-11-25 07:53:06 +00:00

SIRegisterInfo.h

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SIRegisterInfo.td

R600/SI: Fix assembly names for exec_hi and exec_lo

2014-11-14 14:08:04 +00:00

SISchedule.td

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SIShrinkInstructions.cpp

R600/SI: Use s_movk_i32

2014-11-13 20:44:23 +00:00

SITypeRewriter.cpp

Revert "IR: MDNode => Value"

2014-11-11 21:30:22 +00:00