mirror of
https://github.com/c64scene-ar/llvm-6502.git
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f03bb260c9
of the instruction. Note that this change affects the existing non-atomic load and store instructions; the parser now accepts both forms, and the change is noted in the release notes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137527 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
1.1 KiB
LLVM
27 lines
1.1 KiB
LLVM
; RUN: opt -S < %s | FileCheck %s
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; Basic smoke test for atomic operations.
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define void @f(i32* %x) {
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; CHECK: load atomic i32* %x unordered, align 4
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load atomic i32* %x unordered, align 4
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; CHECK: load atomic volatile i32* %x singlethread acquire, align 4
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load atomic volatile i32* %x singlethread acquire, align 4
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; CHECK: store atomic i32 3, i32* %x release, align 4
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store atomic i32 3, i32* %x release, align 4
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; CHECK: store atomic volatile i32 3, i32* %x singlethread monotonic, align 4
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store atomic volatile i32 3, i32* %x singlethread monotonic, align 4
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; CHECK: cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic
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cmpxchg i32* %x, i32 1, i32 0 singlethread monotonic
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; CHECK: cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel
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cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel
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; CHECK: atomicrmw add i32* %x, i32 10 seq_cst
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atomicrmw add i32* %x, i32 10 seq_cst
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; CHECK: atomicrmw volatile xchg i32* %x, i32 10 monotonic
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atomicrmw volatile xchg i32* %x, i32 10 monotonic
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; CHECK: fence singlethread release
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fence singlethread release
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; CHECK: fence seq_cst
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fence seq_cst
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ret void
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}
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