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https://github.com/c64scene-ar/llvm-6502.git
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7d9f2b93a3
long test(long x) { return (x & 123124) | 3; }
Currently compiles to:
_test:
orl $3, %edi
movq %rdi, %rax
andq $123127, %rax
ret
This is because instruction and DAG combiners canonicalize
(or (and x, C), D) -> (and (or, D), (C | D))
However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97616 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
790 B
LLVM
27 lines
790 B
LLVM
; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck -check-prefix=DARWIN %s
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; RUN: opt < %s -O2 | llc -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN-OPT %s
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; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1
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; in this case.
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define i32 @test1(i32 %x, i16 %y) {
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%tmp1 = zext i16 %y to i32
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%tmp2 = and i32 %tmp1, 127
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%tmp4 = shl i32 %x, 16
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%tmp5 = and i32 %tmp4, 16711680
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%tmp6 = or i32 %tmp2, %tmp5
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ret i32 %tmp6
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; DARWIN: andl $16711807, %eax
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}
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; <rdar://problem/7529774> The optimizer shouldn't fold this into (and (or, C), D)
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; if (C & D) == 0
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define i64 @test2(i64 %x) nounwind readnone ssp {
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entry:
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%tmp1 = and i64 %x, 123127
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%tmp2 = or i64 %tmp1, 3
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ret i64 %tmp2
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; DARWIN-OPT: andq $123124
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; DARWIN-OPT-NEXT: leaq 3
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}
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