Jakob Stoklund Olesen dffb051c21 Simplify RegScavenger::forward a bit more. ... Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8		2009-08-08 13:18:47 +00:00
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Alpha
ARM	Convert more Neon tests to use FileCheck.	2009-08-07 23:45:02 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
Mips
MSP430
PIC16	this passes.	2009-08-06 03:55:49 +00:00
PowerPC
SPARC
SystemZ
Thumb
Thumb2	Simplify RegScavenger::forward a bit more.	2009-08-08 13:18:47 +00:00
X86	Do not generate 32-bit call on win64 when imm does not fit	2009-08-07 23:59:21 +00:00
XCore