llvm-6502/test/CodeGen/XCore/ladd_lsub_combine.ll
Stephen Lin 8b2b8a1835 Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:

  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
      TEMP=`mktemp -t temp`
      cp $NAME $TEMP
      sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
      while read FUNC; do
        sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
      done
      sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
      sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
      sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
      sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
      mv $TEMP $NAME
    fi
  done


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 06:24:09 +00:00

68 lines
1.6 KiB
LLVM

; RUN: llc -march=xcore < %s | FileCheck %s
; Only needs one ladd
define i64 @f1(i32 %x, i32 %y) nounwind {
entry:
%0 = zext i32 %x to i64 ; <i64> [#uses=1]
%1 = zext i32 %y to i64 ; <i64> [#uses=1]
%2 = add i64 %1, %0 ; <i64> [#uses=1]
ret i64 %2
}
; CHECK-LABEL: f1:
; CHECK: ldc r2, 0
; CHECK-NEXT: ladd r1, r0, r1, r0, r2
; CHECK-NEXT: retsp 0
; Only needs one lsub and one neg
define i64 @f2(i32 %x, i32 %y) nounwind {
entry:
%0 = zext i32 %x to i64 ; <i64> [#uses=1]
%1 = zext i32 %y to i64 ; <i64> [#uses=1]
%2 = sub i64 %1, %0 ; <i64> [#uses=1]
ret i64 %2
}
; CHECK-LABEL: f2:
; CHECK: ldc r2, 0
; CHECK-NEXT: lsub r1, r0, r1, r0, r2
; CHECK-NEXT: neg r1, r1
; CHECK-NEXT: retsp 0
; Should compile to one ladd and one add
define i64 @f3(i64 %x, i32 %y) nounwind {
entry:
%0 = zext i32 %y to i64 ; <i64> [#uses=1]
%1 = add i64 %x, %0 ; <i64> [#uses=1]
ret i64 %1
}
; CHECK-LABEL: f3:
; CHECK: ldc r3, 0
; CHECK-NEXT: ladd r2, r0, r0, r2, r3
; CHECK-NEXT: add r1, r1, r2
; CHECK-NEXT: retsp 0
; Should compile to one ladd and one add
define i64 @f4(i32 %x, i64 %y) nounwind {
entry:
%0 = zext i32 %x to i64 ; <i64> [#uses=1]
%1 = add i64 %0, %y ; <i64> [#uses=1]
ret i64 %1
}
; CHECK-LABEL: f4:
; CHECK: ldc r3, 0
; CHECK-NEXT: ladd r1, r0, r0, r1, r3
; CHECK-NEXT: add r1, r2, r1
; CHECK-NEXT: retsp 0
; Should compile to one lsub and one sub
define i64 @f5(i64 %x, i32 %y) nounwind {
entry:
%0 = zext i32 %y to i64 ; <i64> [#uses=1]
%1 = sub i64 %x, %0 ; <i64> [#uses=1]
ret i64 %1
}
; CHECK-LABEL: f5:
; CHECK: ldc r3, 0
; CHECK-NEXT: lsub r2, r0, r0, r2, r3
; CHECK-NEXT: sub r1, r1, r2
; CHECK-NEXT: retsp 0