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https://github.com/c64scene-ar/llvm-6502.git
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12c944ba10
- Merge MMX arg passing test files - Merge MMX bitcast, insert elt and shuffle tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227867 91177308-0d34-0410-b5e6-96231b3b80d8
74 lines
1.9 KiB
LLVM
74 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | FileCheck %s -check-prefix=X86-32
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s -check-prefix=X86-64
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;
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; On Darwin x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].
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; On Darwin x86-32, v1i64 values are passed in memory. In this example, they
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; are never moved into an MM register at all.
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; On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].
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; On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.
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@u1 = external global x86_mmx
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define void @t1(x86_mmx %v1) nounwind {
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store x86_mmx %v1, x86_mmx* @u1, align 8
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ret void
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; X86-32-LABEL: t1:
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; X86-32: movq %mm0
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; X86-64-LABEL: t1:
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; X86-64: movdq2q %xmm0
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; X86-64: movq %mm0
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}
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@u2 = external global x86_mmx
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define void @t2(<1 x i64> %v1) nounwind {
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%tmp = bitcast <1 x i64> %v1 to x86_mmx
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store x86_mmx %tmp, x86_mmx* @u2, align 8
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ret void
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; X86-32-LABEL: t2:
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; X86-32: movl 4(%esp)
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; X86-32: movl 8(%esp)
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; X86-64-LABEL: t2:
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; X86-64: movq %rdi
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}
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@g_v8qi = external global <8 x i8>
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define void @t3() nounwind {
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; X86-64-LABEL: t3:
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; X86-64-NOT: movdq2q
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; X86-64: punpcklbw
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%tmp3 = load <8 x i8>* @g_v8qi, align 8
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%tmp3a = bitcast <8 x i8> %tmp3 to x86_mmx
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%tmp4 = tail call i32 (...)* @pass_v8qi( x86_mmx %tmp3a ) nounwind
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ret void
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}
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define void @t4(x86_mmx %v1, x86_mmx %v2) nounwind {
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; X86-64-LABEL: t4:
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; X86-64: movdq2q
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; X86-64: movdq2q
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; X86-64-NOT: movdq2q
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%v1a = bitcast x86_mmx %v1 to <8 x i8>
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%v2b = bitcast x86_mmx %v2 to <8 x i8>
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%tmp3 = add <8 x i8> %v1a, %v2b
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%tmp3a = bitcast <8 x i8> %tmp3 to x86_mmx
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%tmp4 = tail call i32 (...)* @pass_v8qi( x86_mmx %tmp3a ) nounwind
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ret void
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}
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define void @t5() nounwind {
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; X86-64-LABEL: t5:
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; X86-64-NOT: movdq2q
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; X86-64: xorl %edi, %edi
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call void @pass_v1di( <1 x i64> zeroinitializer )
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ret void
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}
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declare i32 @pass_v8qi(...)
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declare void @pass_v1di(<1 x i64>)
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