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f908e37144
Reverting this while I investigate some bad behavior this is causing. As a possibly-related issue, adding -verify-machineinstrs to one of the test cases now fails because of this change: llc test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll -march=x86-64 -o - -verify-machineinstrs *** Bad machine code: No instruction at def index *** - function: foo - basic block: BB#0 return (0x10007e21f10) [0B;736B) - liverange: [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78 4r,784d:0) 0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r - register: %DS Valno #3 is defined at 624r *** Bad machine code: Live segment doesn't end at a valid instruction *** - function: foo - basic block: BB#0 return (0x10007e21f10) [0B;736B) - liverange: [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78 4r,784d:0) 0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r - register: %DS [624r,624d:3) LLVM ERROR: Found 2 machine code errors. where 624r corresponds exactly to the interval combining change: 624B %RSP<def> = COPY %vreg16; GR64:%vreg16 Considering merging %vreg16 with %RSP RHS = %vreg16 [608r,624r:0) 0@608r updated: 608B %RSP<def> = MOV64rm <fi#3>, 1, %noreg, 0, %noreg; mem:LD8[%saved_stack.1] Success: %vreg16 -> %RSP Result = %RSP git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226086 91177308-0d34-0410-b5e6-96231b3b80d8
88 lines
5.0 KiB
LLVM
88 lines
5.0 KiB
LLVM
; RUN: llc < %s
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; RUN: llc < %s -march=x86-64
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; PR3538
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin9"
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define signext i8 @foo(i8* %s1) nounwind ssp {
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entry:
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%s1_addr = alloca i8* ; <i8**> [#uses=2]
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%retval = alloca i32 ; <i32*> [#uses=2]
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%saved_stack.1 = alloca i8* ; <i8**> [#uses=2]
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%0 = alloca i32 ; <i32*> [#uses=2]
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%str.0 = alloca [0 x i8]* ; <[0 x i8]**> [#uses=3]
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%1 = alloca i64 ; <i64*> [#uses=2]
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%2 = alloca i64 ; <i64*> [#uses=1]
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%3 = alloca i64 ; <i64*> [#uses=6]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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call void @llvm.dbg.declare(metadata i8** %s1_addr, metadata !0, metadata !{!"0x102"}), !dbg !7
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store i8* %s1, i8** %s1_addr
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call void @llvm.dbg.declare(metadata [0 x i8]** %str.0, metadata !8, metadata !{!"0x102"}), !dbg !7
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%4 = call i8* @llvm.stacksave(), !dbg !7 ; <i8*> [#uses=1]
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store i8* %4, i8** %saved_stack.1, align 8, !dbg !7
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%5 = load i8** %s1_addr, align 8, !dbg !13 ; <i8*> [#uses=1]
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%6 = call i64 @strlen(i8* %5) nounwind readonly, !dbg !13 ; <i64> [#uses=1]
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%7 = add i64 %6, 1, !dbg !13 ; <i64> [#uses=1]
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store i64 %7, i64* %3, align 8, !dbg !13
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%8 = load i64* %3, align 8, !dbg !13 ; <i64> [#uses=1]
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%9 = sub nsw i64 %8, 1, !dbg !13 ; <i64> [#uses=0]
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%10 = load i64* %3, align 8, !dbg !13 ; <i64> [#uses=1]
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%11 = mul i64 %10, 8, !dbg !13 ; <i64> [#uses=0]
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%12 = load i64* %3, align 8, !dbg !13 ; <i64> [#uses=1]
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store i64 %12, i64* %2, align 8, !dbg !13
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%13 = load i64* %3, align 8, !dbg !13 ; <i64> [#uses=1]
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%14 = mul i64 %13, 8, !dbg !13 ; <i64> [#uses=0]
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%15 = load i64* %3, align 8, !dbg !13 ; <i64> [#uses=1]
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store i64 %15, i64* %1, align 8, !dbg !13
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%16 = load i64* %1, align 8, !dbg !13 ; <i64> [#uses=1]
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%17 = trunc i64 %16 to i32, !dbg !13 ; <i32> [#uses=1]
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%18 = alloca i8, i32 %17, !dbg !13 ; <i8*> [#uses=1]
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%19 = bitcast i8* %18 to [0 x i8]*, !dbg !13 ; <[0 x i8]*> [#uses=1]
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store [0 x i8]* %19, [0 x i8]** %str.0, align 8, !dbg !13
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%20 = load [0 x i8]** %str.0, align 8, !dbg !15 ; <[0 x i8]*> [#uses=1]
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%21 = getelementptr inbounds [0 x i8]* %20, i64 0, i64 0, !dbg !15 ; <i8*> [#uses=1]
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store i8 0, i8* %21, align 1, !dbg !15
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%22 = load [0 x i8]** %str.0, align 8, !dbg !16 ; <[0 x i8]*> [#uses=1]
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%23 = getelementptr inbounds [0 x i8]* %22, i64 0, i64 0, !dbg !16 ; <i8*> [#uses=1]
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%24 = load i8* %23, align 1, !dbg !16 ; <i8> [#uses=1]
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%25 = sext i8 %24 to i32, !dbg !16 ; <i32> [#uses=1]
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store i32 %25, i32* %0, align 4, !dbg !16
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%26 = load i8** %saved_stack.1, align 8, !dbg !16 ; <i8*> [#uses=1]
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call void @llvm.stackrestore(i8* %26), !dbg !16
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%27 = load i32* %0, align 4, !dbg !16 ; <i32> [#uses=1]
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store i32 %27, i32* %retval, align 4, !dbg !16
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br label %return, !dbg !16
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return: ; preds = %entry
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%retval1 = load i32* %retval, !dbg !16 ; <i32> [#uses=1]
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%retval12 = trunc i32 %retval1 to i8, !dbg !16 ; <i8> [#uses=1]
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ret i8 %retval12, !dbg !16
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}
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declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
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declare i8* @llvm.stacksave() nounwind
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declare i64 @strlen(i8*) nounwind readonly
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declare void @llvm.stackrestore(i8*) nounwind
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!0 = !{!"0x101\00s1\002\000", !1, !2, !6} ; [ DW_TAG_arg_variable ]
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!1 = !{!"0x2e\00foo\00foo\00foo\002\000\001\000\006\000\000\000", i32 0, !2, !3, null, null, null, null, null} ; [ DW_TAG_subprogram ]
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!2 = !{!"0x11\001\004.2.1 (Based on Apple Inc. build 5658) (LLVM build)\001\00\000\00\000", !17, !18, !18, null, null, null} ; [ DW_TAG_compile_unit ]
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!3 = !{!"0x15\00\000\000\000\000\000\000", null, !2, null, !4, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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!4 = !{!5, !6}
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!5 = !{!"0x24\00char\000\008\008\000\000\006", null, !2} ; [ DW_TAG_base_type ]
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!6 = !{!"0xf\00\000\0064\0064\000\000", null, !2, !5} ; [ DW_TAG_pointer_type ]
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!7 = !MDLocation(line: 2, scope: !1)
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!8 = !{!"0x100\00str.0\003\000", !1, !2, !9} ; [ DW_TAG_auto_variable ]
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!9 = !{!"0xf\00\000\0064\0064\000\0064", null, !2, !10} ; [ DW_TAG_pointer_type ]
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!10 = !{!"0x1\00\000\008\008\000\000", null, !2, !5, !11, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 8, align 8, offset 0] [from char]
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!11 = !{!12}
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!12 = !{!"0x21\000\001"} ; [ DW_TAG_subrange_type ]
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!13 = !MDLocation(line: 3, scope: !14)
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!14 = !{!"0xb\000\000\000", !17, !1} ; [ DW_TAG_lexical_block ]
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!15 = !MDLocation(line: 4, scope: !14)
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!16 = !MDLocation(line: 5, scope: !14)
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!17 = !{!"vla.c", !"/tmp/"}
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!18 = !{i32 0}
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