Justin Holewinski cb8f98382b [NVPTX] Fix handling of ldg/ldu intrinsics. ... The address space of the pointer must be global (1) for these intrinsics. There must also be alignment metadata attached to the intrinsic calls, e.g. %val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0 !0 = metadata !{i32 4} git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211939 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-27 18:35:51 +00:00
..
AArch64	MachineScheduler: add some book-keeping to fix an assert.	2014-06-27 04:57:05 +00:00
ARM	Fix up scoping in a few tests (and delete one that validates unnecessary behavior).	2014-06-24 20:10:27 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic	Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.	2014-06-05 19:29:43 +00:00
Hexagon	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
Inputs
Mips	Print a=b as an assignment.	2014-06-24 22:45:16 +00:00
MSP430	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
NVPTX	[NVPTX] Fix handling of ldg/ldu intrinsics.	2014-06-27 18:35:51 +00:00
PowerPC	[PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex	2014-06-27 13:04:12 +00:00
R600	Fix test so it doesn't try to write out temporary files into the test tree.	2014-06-27 17:45:43 +00:00
SPARC	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Thumb	ARM: Fix fastcc calling convention for Thumb1	2014-06-13 08:33:03 +00:00
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	[x86] Fix a miscompile in the new shuffle lowering uncovered by	2014-06-27 18:25:23 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00