Chandler Carruth cba9d1273a [x86] Add the beginnings of a proper DAG combine to match ADDSUBPS and ... ADDSUBPD nodes out of blends of adds and subs. This allows us to actually form these instructions with SSE3 rather than only forming them when we had both SSE3 for the ADDSUB instructions and SSE4.1 for the blend instructions. ;] Kind-of important. I've adjusted the CPU requirements on one of the tests to demonstrate this kicking in nicely for an SSE3 cpu configuration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217848 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-16 00:15:20 +00:00
..
Analysis	CHECK-LABELize test	2014-09-15 17:56:56 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[x86] Add the beginnings of a proper DAG combine to match ADDSUBPS and	2014-09-16 00:15:20 +00:00
DebugInfo
ExecutionEngine
Feature	[AArch64] Update test case to pass with post-RA MI scheduler.	2014-09-13 03:23:23 +00:00
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC	[mips] Marked the DADDiu instruction aliases as MIPS III.	2014-09-15 14:47:46 +00:00
Object
Other	[lit] Parse all strings as UTF-8 rather than ASCII.	2014-09-12 16:46:05 +00:00
TableGen
tools	llvm-cov: Make debug output more consistent	2014-09-15 22:23:29 +00:00
Transforms	InstSimplify: Simplify trivial and/or of icmps	2014-09-15 08:15:28 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh