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llvm-6502/test/CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll
Evan Cheng 6d6d352ed9 Sometimes a MI can define a register as well as defining a super-register at the
same time. Do not mark the "smaller" def as dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41871 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 22:34:47 +00:00

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416 B
LLVM

; RUN: llvm-as < %s | llc -march=ppc64
%struct.TCMalloc_SpinLock = type { i32 }
define void @_ZN17TCMalloc_SpinLock4LockEv(%struct.TCMalloc_SpinLock* %this) {
entry:
%tmp3 = call i32 asm sideeffect "1: lwarx $0, 0, $1\0A\09stwcx. $2, 0, $1\0A\09bne- 1b\0A\09isync", "=&r,=*r,r,1,~{dirflag},~{fpsr},~{flags},~{memory}"( i32** null, i32 1, i32* null ) ; <i32> [#uses=0]
unreachable
}