llvm-6502/test/CodeGen/ARM/argaddr.ll
Saleem Abdulrasool 5fe5b3dcc8 ARM: update even more tests
More updating of tests to be explicit about the target triple rather than
relying on the default target triple supporting ARM mode.

Indicate to lit that object emission is not yet available for Windows on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205545 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 17:35:22 +00:00

20 lines
739 B
LLVM

; RUN: llc -mtriple=arm-eabi %s -o /dev/null
define void @f(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
entry:
%a_addr = alloca i32 ; <i32*> [#uses=2]
%b_addr = alloca i32 ; <i32*> [#uses=2]
%c_addr = alloca i32 ; <i32*> [#uses=2]
%d_addr = alloca i32 ; <i32*> [#uses=2]
%e_addr = alloca i32 ; <i32*> [#uses=2]
store i32 %a, i32* %a_addr
store i32 %b, i32* %b_addr
store i32 %c, i32* %c_addr
store i32 %d, i32* %d_addr
store i32 %e, i32* %e_addr
call void @g( i32* %a_addr, i32* %b_addr, i32* %c_addr, i32* %d_addr, i32* %e_addr )
ret void
}
declare void @g(i32*, i32*, i32*, i32*, i32*)