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https://github.com/c64scene-ar/llvm-6502.git
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15ee8adb00
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18263 91177308-0d34-0410-b5e6-96231b3b80d8
244 lines
9.5 KiB
C++
244 lines
9.5 KiB
C++
//===-- PPC32JITInfo.cpp - Implement the JIT interfaces for the PowerPC ---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the JIT interfaces for the 32-bit PowerPC target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "jit"
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#include "PPC32JITInfo.h"
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#include "PPC32Relocations.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/Config/alloca.h"
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#include <set>
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using namespace llvm;
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static TargetJITInfo::JITCompilerFn JITCompilerFunction;
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#define BUILD_ADDIS(RD,RS,IMM16) \
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((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
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#define BUILD_ORI(RD,RS,UIMM16) \
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((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
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#define BUILD_MTSPR(RS,SPR) \
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((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
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#define BUILD_BCCTRx(BO,BI,LINK) \
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((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
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// Pseudo-ops
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#define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
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#define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
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#define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
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static void EmitBranchToAt(void *At, void *To, bool isCall) {
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intptr_t Addr = (intptr_t)To;
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// FIXME: should special case the short branch case.
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unsigned *AtI = (unsigned*)At;
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AtI[0] = BUILD_LIS(12, Addr >> 16); // lis r12, hi16(address)
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AtI[1] = BUILD_ORI(12, 12, Addr); // ori r12, r12, low16(address)
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AtI[2] = BUILD_MTCTR(12); // mtctr r12
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AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
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}
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extern "C" void PPC32CompilationCallback();
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#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
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// CompilationCallback stub - We can't use a C function with inline assembly in
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// it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
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// write our own wrapper, which does things our way, so we have complete control
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// over register saving and restoring.
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asm(
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".text\n"
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".align 2\n"
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".globl _PPC32CompilationCallback\n"
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"_PPC32CompilationCallback:\n"
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// Make space for 29 ints r[3-31] and 14 doubles f[0-13]
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"stwu r1, -272(r1)\n"
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"mflr r11\n"
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"stw r11, 280(r1)\n" // Set up a proper stack frame
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"stmw r3, 156(r1)\n" // Save all of the integer registers
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// Save all call-clobbered FP regs.
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"stfd f1, 44(r1)\n" "stfd f2, 52(r1)\n" "stfd f3, 60(r1)\n"
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"stfd f4, 68(r1)\n" "stfd f5, 76(r1)\n" "stfd f6, 84(r1)\n"
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"stfd f7, 92(r1)\n" "stfd f8, 100(r1)\n" "stfd f9, 108(r1)\n"
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"stfd f10, 116(r1)\n" "stfd f11, 124(r1)\n" "stfd f12, 132(r1)\n"
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"stfd f13, 140(r1)\n"
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// Now that everything is saved, go to the C compilation callback function,
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// passing the address of the intregs and fpregs.
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"addi r3, r1, 156\n" // &IntRegs[0]
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"addi r4, r1, 44\n" // &FPRegs[0]
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"bl _PPC32CompilationCallbackC\n"
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);
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#else
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void PPC32CompilationCallback() {
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assert(0 && "This is not a power pc, you can't execute this!");
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abort();
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}
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#endif
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extern "C" void PPC32CompilationCallbackC(unsigned *IntRegs, double *FPRegs) {
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unsigned *CameFromStub = (unsigned*)__builtin_return_address(0+1);
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unsigned *CameFromOrig = (unsigned*)__builtin_return_address(1+1);
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unsigned *CCStackPtr = (unsigned*)__builtin_frame_address(0);
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//unsigned *StubStackPtr = (unsigned*)__builtin_frame_address(1);
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unsigned *OrigStackPtr = (unsigned*)__builtin_frame_address(2+1);
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// Adjust pointer to the branch, not the return address.
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--CameFromStub;
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void *Target = JITCompilerFunction(CameFromStub);
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// Check to see if CameFromOrig[-1] is a 'bl' instruction, and if we can
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// rewrite it to branch directly to the destination. If so, rewrite it so it
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// does not need to go through the stub anymore.
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unsigned CameFromOrigInst = CameFromOrig[-1];
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if ((CameFromOrigInst >> 26) == 18) { // Direct call.
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intptr_t Offset = ((intptr_t)Target-(intptr_t)CameFromOrig+4) >> 2;
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if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
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// Clear the original target out.
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CameFromOrigInst &= (63 << 26) | 3;
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// Fill in the new target.
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CameFromOrigInst |= (Offset & ((1 << 24)-1)) << 2;
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// Replace the call.
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CameFromOrig[-1] = CameFromOrigInst;
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}
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}
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// Locate the start of the stub. If this is a short call, adjust backwards
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// the short amount, otherwise the full amount.
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bool isShortStub = (*CameFromStub >> 26) == 18;
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CameFromStub -= isShortStub ? 2 : 6;
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// Rewrite the stub with an unconditional branch to the target, for any users
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// who took the address of the stub.
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EmitBranchToAt(CameFromStub, Target, false);
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// Change the SP so that we pop two stack frames off when we return.
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*CCStackPtr = (intptr_t)OrigStackPtr;
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// Put the address of the stub and the LR value that originally came into the
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// stub in a place that is easy to get on the stack after we restore all regs.
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CCStackPtr[2] = (intptr_t)Target;
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CCStackPtr[1] = (intptr_t)CameFromOrig;
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// Note, this is not a standard epilog!
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#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
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register unsigned *IRR asm ("r2") = IntRegs;
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register double *FRR asm ("r3") = FPRegs;
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__asm__ __volatile__ (
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"lfd f1, 0(%0)\n" "lfd f2, 8(%0)\n" "lfd f3, 16(%0)\n"
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"lfd f4, 24(%0)\n" "lfd f5, 32(%0)\n" "lfd f6, 40(%0)\n"
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"lfd f7, 48(%0)\n" "lfd f8, 56(%0)\n" "lfd f9, 64(%0)\n"
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"lfd f10, 72(%0)\n" "lfd f11, 80(%0)\n" "lfd f12, 88(%0)\n"
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"lfd f13, 96(%0)\n"
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"lmw r3, 0(%1)\n" // Load all integer regs
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"lwz r0,4(r1)\n" // Get CameFromOrig (LR into stub)
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"mtlr r0\n" // Put it in the LR register
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"lwz r0,8(r1)\n" // Get target function pointer
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"mtctr r0\n" // Put it into the CTR register
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"lwz r1,0(r1)\n" // Pop two frames off
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"bctr\n" :: // Return to stub!
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"b" (FRR), "b" (IRR));
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#endif
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}
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TargetJITInfo::LazyResolverFn
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PPC32JITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
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JITCompilerFunction = Fn;
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return PPC32CompilationCallback;
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}
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void *PPC32JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
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// If this is just a call to an external function, emit a branch instead of a
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// call. The code is the same except for one bit of the last instruction.
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if (Fn != PPC32CompilationCallback) {
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MCE.startFunctionStub(4*4);
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void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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EmitBranchToAt(Addr, Fn, false);
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return MCE.finishFunctionStub(0);
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}
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MCE.startFunctionStub(4*7);
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MCE.emitWord(0x9421ffe0); // stwu r1,-32(r1)
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MCE.emitWord(0x7d6802a6); // mflr r11
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MCE.emitWord(0x91610028); // stw r11, 40(r1)
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void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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EmitBranchToAt(Addr, Fn, true/*is call*/);
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return MCE.finishFunctionStub(0);
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}
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void PPC32JITInfo::relocate(void *Function, MachineRelocation *MR,
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unsigned NumRelocs) {
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for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
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unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
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intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
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switch ((PPC::RelocationType)MR->getRelocationType()) {
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default: assert(0 && "Unknown relocation type!");
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case PPC::reloc_pcrel_bx:
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// PC-relative relocation for b and bl instructions.
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ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
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assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
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"Relocation out of range!");
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*RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
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break;
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case PPC::reloc_absolute_ptr_high: // Pointer relocations.
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case PPC::reloc_absolute_ptr_low: {
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// Pointer relocations are used for the PPC external stubs and lazy
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// resolver pointers that the Darwin ABI likes to use. Basically, the
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// address of the global is actually stored in memory, and the address of
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// the pointer is relocated into instructions instead of the pointer
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// itself. Because we have to keep the mapping anyway, we just return
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// pointers to the values in the map as our new location.
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static std::set<void*> Pointers;
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ResultPtr = (intptr_t)&*Pointers.insert((void*)ResultPtr).first;
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}
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// FALL THROUGH
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case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
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case PPC::reloc_absolute_low: // low bits of ref -> low 16 of instr
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ResultPtr += MR->getConstantVal();
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// If this is a high-part access, get the high-part.
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if (MR->getRelocationType() == PPC::reloc_absolute_high ||
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MR->getRelocationType() == PPC::reloc_absolute_ptr_high) {
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// If the low part will have a carry (really a borrow) from the low
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// 16-bits into the high 16, add a bit to borrow from.
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if (((int)ResultPtr << 16) < 0)
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ResultPtr += 1 << 16;
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ResultPtr >>= 16;
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}
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// Do the addition then mask, so the addition does not overflow the 16-bit
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// immediate section of the instruction.
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unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
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unsigned HighBits = *RelocPos & ~65535;
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*RelocPos = LowBits | HighBits; // Slam into low 16-bits
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break;
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}
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}
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}
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void PPC32JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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EmitBranchToAt(Old, New, false);
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}
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