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cd52a7a381
Apparently, the style needs to be agreed upon first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
54 lines
1.9 KiB
C++
54 lines
1.9 KiB
C++
//===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the X86 subclass for TargetSelectionDAGInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
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#define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
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#include "llvm/Target/TargetSelectionDAGInfo.h"
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namespace llvm {
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class X86TargetLowering;
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class X86TargetMachine;
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class X86Subtarget;
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class X86SelectionDAGInfo : public TargetSelectionDAGInfo {
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/// Returns true if it is possible for the base register to conflict with the
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/// given set of clobbers for a memory intrinsic.
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bool isBaseRegConflictPossible(SelectionDAG &DAG,
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ArrayRef<unsigned> ClobberSet) const;
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public:
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explicit X86SelectionDAGInfo(const DataLayout &DL);
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~X86SelectionDAGInfo();
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SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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bool isVolatile,
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MachinePointerInfo DstPtrInfo) const override;
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SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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bool isVolatile, bool AlwaysInline,
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MachinePointerInfo DstPtrInfo,
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MachinePointerInfo SrcPtrInfo) const override;
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};
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}
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#endif
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