llvm-6502/test/CodeGen/X86/shift-codegen.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

39 lines
927 B
LLVM

; RUN: llc < %s -relocation-model=static -march=x86 | FileCheck %s
; This should produce two shll instructions, not any lea's.
target triple = "i686-apple-darwin8"
@Y = weak global i32 0 ; <i32*> [#uses=1]
@X = weak global i32 0 ; <i32*> [#uses=2]
define void @fn1() {
; CHECK-LABEL: fn1:
; CHECK-NOT: ret
; CHECK-NOT: lea
; CHECK: shll $3
; CHECK-NOT: lea
; CHECK: ret
%tmp = load i32, i32* @Y ; <i32> [#uses=1]
%tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1]
%tmp2 = load i32, i32* @X ; <i32> [#uses=1]
%tmp3 = or i32 %tmp1, %tmp2 ; <i32> [#uses=1]
store i32 %tmp3, i32* @X
ret void
}
define i32 @fn2(i32 %X, i32 %Y) {
; CHECK-LABEL: fn2:
; CHECK-NOT: ret
; CHECK-NOT: lea
; CHECK: shll $3
; CHECK-NOT: lea
; CHECK: ret
%tmp2 = shl i32 %Y, 3 ; <i32> [#uses=1]
%tmp4 = or i32 %tmp2, %X ; <i32> [#uses=1]
ret i32 %tmp4
}