llvm-6502/test/CodeGen/X86/fast-cc-pass-in-regs.ll
Dan Gohman b1576f56c8 Change the x86 assembly output to use tab characters to separate the
mnemonics from their operands instead of single spaces. This makes the
assembly output a little more consistent with various other compilers
(f.e. GCC), and slightly easier to read. Also, update the regression
tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40648 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-31 20:11:57 +00:00

16 lines
380 B
LLVM

; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {mov EDX, 1}
; check that fastcc is passing stuff in regs.
declare x86_fastcallcc i64 @callee(i64)
define i64 @caller() {
%X = callx86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1]
ret i64 %X
}
define x86_fastcallcc i64 @caller2(i64 %X) {
ret i64 %X
}