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https://github.com/c64scene-ar/llvm-6502.git
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fa848ccd09
Try to keep all the setOperationActions for integer ops together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211001 91177308-0d34-0410-b5e6-96231b3b80d8
97 lines
2.9 KiB
C++
97 lines
2.9 KiB
C++
//===-- AMDILISelLowering.cpp - AMDIL DAG Lowering Implementation ---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief TargetLowering functions borrowed from AMDIL.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUISelLowering.h"
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#include "AMDGPUSubtarget.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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// TargetLowering Class Implementation Begins
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//===----------------------------------------------------------------------===//
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void AMDGPUTargetLowering::InitAMDILLowering() {
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static const MVT::SimpleValueType types[] = {
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MVT::i32,
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MVT::f32,
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MVT::f64,
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MVT::i64,
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MVT::v4f32,
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MVT::v4i32,
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MVT::v2f32,
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MVT::v2i32
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};
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static const MVT::SimpleValueType FloatTypes[] = {
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MVT::f32,
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MVT::f64
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};
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static const MVT::SimpleValueType VectorTypes[] = {
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MVT::v4f32,
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MVT::v4i32,
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MVT::v2f32,
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MVT::v2i32
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};
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const AMDGPUSubtarget &STM = getTargetMachine().getSubtarget<AMDGPUSubtarget>();
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for (MVT VT : types) {
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setOperationAction(ISD::SUBE, VT, Expand);
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setOperationAction(ISD::SUBC, VT, Expand);
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setOperationAction(ISD::ADDE, VT, Expand);
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setOperationAction(ISD::ADDC, VT, Expand);
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setOperationAction(ISD::BRCOND, VT, Custom);
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setOperationAction(ISD::BR_JT, VT, Expand);
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setOperationAction(ISD::BRIND, VT, Expand);
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}
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for (MVT VT : FloatTypes) {
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setOperationAction(ISD::FP_ROUND_INREG, VT, Expand);
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}
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for (MVT VT : VectorTypes) {
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setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand);
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setOperationAction(ISD::SELECT_CC, VT, Expand);
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}
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if (STM.hasHWFP64()) {
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setOperationAction(ISD::ConstantFP, MVT::f64, Legal);
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setOperationAction(ISD::FABS, MVT::f64, Expand);
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}
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setOperationAction(ISD::SUBC, MVT::Other, Expand);
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setOperationAction(ISD::ADDE, MVT::Other, Expand);
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setOperationAction(ISD::ADDC, MVT::Other, Expand);
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setOperationAction(ISD::BRCOND, MVT::Other, Custom);
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setOperationAction(ISD::BR_JT, MVT::Other, Expand);
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setOperationAction(ISD::BRIND, MVT::Other, Expand);
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setOperationAction(ISD::Constant, MVT::i32, Legal);
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setOperationAction(ISD::Constant, MVT::i64, Legal);
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setOperationAction(ISD::ConstantFP, MVT::f32, Legal);
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setPow2DivIsCheap(false);
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setSelectIsExpensive(true); // FIXME: This makes no sense at all
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}
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SDValue AMDGPUTargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
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SDValue Chain = Op.getOperand(0);
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SDValue Cond = Op.getOperand(1);
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SDValue Jump = Op.getOperand(2);
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return DAG.getNode(AMDGPUISD::BRANCH_COND, SDLoc(Op), Op.getValueType(),
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Chain, Jump, Cond);
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}
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