Chris Lattner 6ec3626be4 restore my previous patch, now that the X86 backend bug has been fixed: ... http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061009/038518.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30906 91177308-0d34-0410-b5e6-96231b3b80d8		2006-10-12 17:45:38 +00:00
..
SelectionDAG	D'oh - need to use the rigth kind of store.	2006-10-12 15:22:24 +00:00
AsmPrinter.cpp	Jimptables working again on alpha.	2006-10-11 04:29:42 +00:00
BranchFolding.cpp
DwarfWriter.cpp	More long term solution	2006-10-04 10:40:15 +00:00
ELFWriter.cpp
IntrinsicLowering.cpp
LiveInterval.cpp
LiveIntervalAnalysis.cpp	Keep track of the start of MBB's in a separate map from instructions. This	2006-09-15 03:57:23 +00:00
LiveVariables.cpp	Fix for PR929. The PHI nodes were being gone through for each instruction	2006-10-03 07:20:20 +00:00
LLVMTargetMachine.cpp	add setJumpBufSize() and setJumpBufAlignment() to target-lowering.	2006-09-04 06:21:35 +00:00
MachineBasicBlock.cpp	print labels even if a MBB doesn't have a corresponding LLVM BB, just don't	2006-10-06 21:28:17 +00:00
MachineDebugInfo.cpp
MachineFunction.cpp	Bugfixes	2006-10-03 20:19:23 +00:00
MachineInstr.cpp	Only call isUse/isDef on register operands	2006-09-05 20:19:27 +00:00
MachinePassRegistry.cpp
MachOWriter.cpp	Behold, more work on relocations. Things are looking pretty good now.	2006-09-10 23:03:44 +00:00
Makefile
Passes.cpp
PHIElimination.cpp	"Once more into the breach, dear friends, once more, or fill the wall up	2006-09-28 07:10:24 +00:00
PhysRegTracker.h
PrologEpilogInserter.cpp	TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.	2006-09-28 18:52:32 +00:00
RegAllocLinearScan.cpp
RegAllocLocal.cpp	Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not	2006-09-19 18:02:01 +00:00
RegAllocSimple.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp	restore my previous patch, now that the X86 backend bug has been fixed:	2006-10-12 17:45:38 +00:00
VirtRegMap.h	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00