Colin LeMahieu cf2daa3671 [Hexagon] Adding combine reg, reg with predicated forms. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223667 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-08 17:33:06 +00:00
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AArch64
ARM	Add support for ARM modified-immediate assembly syntax.	2014-12-02 10:53:20 +00:00
Hexagon	[Hexagon] Adding combine reg, reg with predicated forms.	2014-12-08 17:33:06 +00:00
Mips
PowerPC
Sparc
SystemZ
X86
XCore