mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-12 02:33:33 +00:00
a6afad8b33
There are two add-immediate instructions in Thumb1: tADDi8 and tADDi3. Only the latter supports using different source and destination registers, so whenever we materialize a new base register (at a certain offset) we'd do so by moving the base register value to the new register and then adding in place. This patch changes the code to use a single tADDi3 if the offset is small enough to fit in 3 bits. Differential Revision: http://reviews.llvm.org/D5006 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216193 91177308-0d34-0410-b5e6-96231b3b80d8
28 lines
809 B
LLVM
28 lines
809 B
LLVM
; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs %s -o - | FileCheck %s
|
|
|
|
@d = external global [64 x i32]
|
|
@s = external global [64 x i32]
|
|
|
|
; Function Attrs: nounwind
|
|
define void @t1() #0 {
|
|
entry:
|
|
; CHECK-LABEL: t1
|
|
; CHECK-NOT: ldm
|
|
; CHECK-NOT: stm
|
|
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([64 x i32]* @s to i8*), i8* bitcast ([64 x i32]* @d to i8*), i32 17, i32 4, i1 false)
|
|
ret void
|
|
}
|
|
|
|
; Function Attrs: nounwind
|
|
define void @t2() #0 {
|
|
entry:
|
|
; CHECK-LABEL: t2:
|
|
; CHECK-NOT: ldm
|
|
; CHECK-NOT: stm
|
|
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([64 x i32]* @s to i8*), i8* bitcast ([64 x i32]* @d to i8*), i32 15, i32 4, i1 false)
|
|
ret void
|
|
}
|
|
|
|
; Function Attrs: nounwind
|
|
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1
|