llvm-6502/test/CodeGen
2012-05-09 01:38:13 +00:00
..
ARM Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled. 2012-05-07 20:51:25 +00:00
CellSPU Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00
CPP Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Generic Move to X86 directory because this fails on non-X86 platforms. 2012-04-16 16:38:48 +00:00
Hexagon Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips Make register FP allocatable if the compiled function does not have dynamic 2012-05-09 01:38:13 +00:00
MSP430 Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
NVPTX This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it. 2012-05-04 20:18:50 +00:00
PowerPC Remove dead SD nodes after the combining pass. Fixes PR12201. 2012-04-16 03:33:22 +00:00
PTX Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
SPARC Regression test for PR2960. 2012-05-01 11:11:34 +00:00
Thumb Make test less fragile. 2012-04-27 20:48:18 +00:00
Thumb2 Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits encoding of CMN instructions. 2012-05-04 19:53:56 +00:00
X86 Remove 256-bit AVX non-temporal store intrinsics. Similar was previously done for 128-bit. 2012-05-08 06:58:15 +00:00
XCore Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00