Reed Kotler cf76da912c fix materialization of one bit constants and global values which are accessed through ... a base GOT entry. Summary: get tip of tree mips fast-isel to pass test-suite Two bugs were fixed: 1) one bit booleans were treated as 1 bit signed integers and so the literal '1' could become sign extended. 2) mips uses got for pic but in certain cases, as with string constants for example, many items can be referenced from the same got entry and this case was not handled properly. Test Plan: test-suite Reviewers: dsanders Reviewed By: dsanders Subscribers: mcrosier Differential Revision: http://reviews.llvm.org/D4801 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215155 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-07 22:09:01 +00:00
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AArch64	MachineCombiner Pass for selecting faster instruction sequence on AArch64	2014-08-07 21:40:58 +00:00
ARM	[Branch probability] Recompute branch weights of tail-merged basic blocks.	2014-08-07 19:30:13 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
Hexagon	DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.	2014-08-06 00:21:25 +00:00
Inputs
Mips	fix materialization of one bit constants and global values which are accessed through	2014-08-07 22:09:01 +00:00
MSP430	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
NVPTX	[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types	2014-07-23 20:23:49 +00:00
PowerPC	[PowerPC] Swap arguments and adjust shift count for vsldoi on little endian	2014-08-05 20:47:25 +00:00
R600	R600: Cleanup fadd and fsub tests	2014-08-06 20:27:55 +00:00
SPARC	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Thumb	[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly	2014-08-02 05:40:40 +00:00
Thumb2	ARM: do not generate BLX instructions on Cortex-M CPUs.	2014-08-06 11:13:14 +00:00
X86	[x86] Fix another miscompile found through fuzz testing the new vector	2014-08-07 10:37:35 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00