Evan Cheng cf7895ff8b (i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8		2009-05-30 08:43:27 +00:00
..
Alpha
ARM	Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and	2009-05-19 10:02:36 +00:00
CBackend
CellSPU
CPP
Generic	Add a new codegen pass that normalizes dwarf exception handling	2009-05-22 20:36:31 +00:00
IA64
Mips	This looks like it passes now.	2009-05-27 17:43:21 +00:00
MSP430	Fix for PR4235: to build a floating-point value from integer parts,	2009-05-20 06:02:09 +00:00
PowerPC	Add explicit test for PR4280.	2009-05-28 21:04:35 +00:00
SPARC
X86	(i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits.	2009-05-30 08:43:27 +00:00
XCore	Fix for PR4235: to build a floating-point value from integer parts,	2009-05-20 06:02:09 +00:00