Robin Morisset fd4c3c983e Add AtomicExpandPass::bracketInstWithFences, and use it whenever getInsertFencesForAtomic would trigger in SelectionDAGBuilder ... Summary: The goal is to eventually remove all the code related to getInsertFencesForAtomic in SelectionDAGBuilder as it is wrong (designed for ARM, not really portable, works mostly by accident because the backends are overly conservative), and repeats the same logic that goes in emitLeading/TrailingFence. In this patch, I make AtomicExpandPass insert the fences as it knows better where to put them. Because this requires getting the fences and not just passing an IRBuilder around, I had to change the return type of emitLeading/TrailingFence. This code only triggers on ARM for now. Because it is earlier in the pipeline than SelectionDAGBuilder, it triggers and lowers atomic accesses to atomic so SelectionDAGBuilder does not add barriers anymore on ARM. If this patch is accepted I plan to implement emitLeading/TrailingFence for all backends that setInsertFencesForAtomic(true), which will allow both making them less conservative and simplifying SelectionDAGBuilder once they are all using this interface. This should not cause any functionnal change so the existing tests are used and not modified. Test Plan: make check-all, benefits from existing tests of atomics on ARM Reviewers: jfb, t.p.northover Subscribers: aemerson, llvm-commits Differential Revision: http://reviews.llvm.org/D5179 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218329 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-23 20:31:14 +00:00
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CostTable.h	Add a overload to CostTable which allows it to infer the size of the table.	2013-08-09 19:33:32 +00:00
Target.td	Add isInsertSubreg property.	2014-08-20 23:49:36 +00:00
TargetCallingConv.h	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
TargetCallingConv.td	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
TargetFrameLowering.h	Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore SEH pseudo ops in X86 JIT emitter.	2014-06-25 12:41:52 +00:00
TargetInstrInfo.h	Fix a lot of confusion around inserting nops on empty functions.	2014-09-15 18:32:58 +00:00
TargetIntrinsicInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetItinerary.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetLibraryInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetLowering.h	Add AtomicExpandPass::bracketInstWithFences, and use it whenever getInsertFencesForAtomic would trigger in SelectionDAGBuilder	2014-09-23 20:31:14 +00:00
TargetLoweringObjectFile.h	CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF	2014-07-14 22:57:27 +00:00
TargetMachine.h	Add a new pass FunctionTargetTransformInfo. This pass serves as a	2014-09-18 00:34:14 +00:00
TargetOpcodes.h	[stack protector] Fix a potential security bug in stack protector where the	2014-07-25 19:31:34 +00:00
TargetOptions.h	Satiate the sanitizer build bot	2014-08-21 20:09:15 +00:00
TargetRegisterInfo.h	[RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the TargetRegisterInfo instead of the TargetSubtargetInfo.	2014-07-16 20:13:31 +00:00
TargetSchedule.td	Move Post RA Scheduling flag bit into SchedMachineModel	2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td	Fix typos	2014-07-17 17:50:22 +00:00
TargetSelectionDAGInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetSubtargetInfo.h	Remove resetSubtargetFeatures as it is unused.	2014-09-03 20:36:31 +00:00