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93ee286e8d
which many Mips 64 ABIs use than for O64 which many
if not all other target ABIs use.
Most architectures have the following 64 bit relocation record format:
typedef struct
{
Elf64_Addr r_offset; /* Address of reference */
Elf64_Xword r_info; /* Symbol index and type of relocation */
} Elf64_Rel;
typedef struct
{
Elf64_Addr r_offset;
Elf64_Xword r_info;
Elf64_Sxword r_addend;
} Elf64_Rela;
Whereas N64 has the following format:
typedef struct
{
Elf64_Addr r_offset;/* Address of reference */
Elf64_Word r_sym; /* Symbol index */
Elf64_Byte r_ssym; /* Special symbol */
Elf64_Byte r_type3; /* Relocation type */
Elf64_Byte r_type2; /* Relocation type */
Elf64_Byte r_type; /* Relocation type */
} Elf64_Rel;
typedef struct
{
Elf64_Addr r_offset;/* Address of reference */
Elf64_Word r_sym; /* Symbol index */
Elf64_Byte r_ssym; /* Special symbol */
Elf64_Byte r_type3; /* Relocation type */
Elf64_Byte r_type2; /* Relocation type */
Elf64_Byte r_type; /* Relocation type */
Elf64_Sxword r_addend;
} Elf64_Rela;
The structure is the same size, but the r_info data element
is now 5 separate elements. Besides the content aspects,
endian byte reordering will be different for the area with
each element being endianized separately.
I treat this as generic and continue to pass r_type as
an integer masking and unmasking the byte sized N64
values for N64 mode. I've implemented this and it causes no
affect on other current targets.
This passes make check.
Jack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159299 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
1.8 KiB
C++
49 lines
1.8 KiB
C++
//===-- MCELFObjectTargetWriter.cpp - ELF Target Writer Subclass ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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using namespace llvm;
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MCELFObjectTargetWriter::MCELFObjectTargetWriter(bool Is64Bit_,
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uint8_t OSABI_,
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uint16_t EMachine_,
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bool HasRelocationAddend_,
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bool IsN64_)
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: OSABI(OSABI_), EMachine(EMachine_),
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HasRelocationAddend(HasRelocationAddend_), Is64Bit(Is64Bit_),
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IsN64(IsN64_){
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}
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/// Default e_flags = 0
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unsigned MCELFObjectTargetWriter::getEFlags() const {
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return 0;
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}
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const MCSymbol *MCELFObjectTargetWriter::ExplicitRelSym(const MCAssembler &Asm,
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const MCValue &Target,
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const MCFragment &F,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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return NULL;
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}
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void MCELFObjectTargetWriter::adjustFixupOffset(const MCFixup &Fixup,
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uint64_t &RelocOffset) {
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}
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void
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MCELFObjectTargetWriter::sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs) {
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// Sort by the r_offset, just like gnu as does.
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array_pod_sort(Relocs.begin(), Relocs.end());
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}
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