mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-17 18:31:04 +00:00
ecf0fcd2b1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191287 91177308-0d34-0410-b5e6-96231b3b80d8
190 lines
4.8 KiB
LLVM
190 lines
4.8 KiB
LLVM
; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; atomicrmw xchg: store clean shadow, return clean shadow
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define i32 @AtomicRmwXchg(i32* %p, i32 %x) sanitize_memory {
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entry:
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%0 = atomicrmw xchg i32* %p, i32 %x seq_cst
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ret i32 %0
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}
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; CHECK: @AtomicRmwXchg
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; CHECK: store i32 0,
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; CHECK: atomicrmw xchg {{.*}} seq_cst
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; CHECK: store i32 0, {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; atomicrmw max: exactly the same as above
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define i32 @AtomicRmwMax(i32* %p, i32 %x) sanitize_memory {
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entry:
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%0 = atomicrmw max i32* %p, i32 %x seq_cst
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ret i32 %0
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}
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; CHECK: @AtomicRmwMax
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; CHECK: store i32 0,
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; CHECK: atomicrmw max {{.*}} seq_cst
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; CHECK: store i32 0, {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; cmpxchg: the same as above, but also check %a shadow
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define i32 @Cmpxchg(i32* %p, i32 %a, i32 %b) sanitize_memory {
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entry:
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%0 = cmpxchg i32* %p, i32 %a, i32 %b seq_cst
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ret i32 %0
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}
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; CHECK: @Cmpxchg
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; CHECK: store i32 0,
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; CHECK: icmp
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; CHECK: br
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; CHECK: @__msan_warning
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; CHECK: cmpxchg {{.*}} seq_cst
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; CHECK: store i32 0, {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; relaxed cmpxchg: bump up to "release"
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define i32 @CmpxchgMonotonic(i32* %p, i32 %a, i32 %b) sanitize_memory {
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entry:
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%0 = cmpxchg i32* %p, i32 %a, i32 %b monotonic
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ret i32 %0
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}
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; CHECK: @CmpxchgMonotonic
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; CHECK: store i32 0,
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; CHECK: icmp
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; CHECK: br
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; CHECK: @__msan_warning
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; CHECK: cmpxchg {{.*}} release
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; CHECK: store i32 0, {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; atomic load: preserve alignment, load shadow value after app value
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define i32 @AtomicLoad(i32* %p) sanitize_memory {
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entry:
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%0 = load atomic i32* %p seq_cst, align 16
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ret i32 %0
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}
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; CHECK: @AtomicLoad
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; CHECK: load atomic i32* {{.*}} seq_cst, align 16
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; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
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; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; atomic load: preserve alignment, load shadow value after app value
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define i32 @AtomicLoadAcquire(i32* %p) sanitize_memory {
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entry:
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%0 = load atomic i32* %p acquire, align 16
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ret i32 %0
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}
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; CHECK: @AtomicLoadAcquire
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; CHECK: load atomic i32* {{.*}} acquire, align 16
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; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
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; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; atomic load monotonic: bump up to load acquire
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define i32 @AtomicLoadMonotonic(i32* %p) sanitize_memory {
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entry:
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%0 = load atomic i32* %p monotonic, align 16
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ret i32 %0
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}
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; CHECK: @AtomicLoadMonotonic
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; CHECK: load atomic i32* {{.*}} acquire, align 16
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; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
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; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; atomic load unordered: bump up to load acquire
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define i32 @AtomicLoadUnordered(i32* %p) sanitize_memory {
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entry:
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%0 = load atomic i32* %p unordered, align 16
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ret i32 %0
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}
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; CHECK: @AtomicLoadUnordered
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; CHECK: load atomic i32* {{.*}} acquire, align 16
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; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
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; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; atomic store: preserve alignment, store clean shadow value before app value
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define void @AtomicStore(i32* %p, i32 %x) sanitize_memory {
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entry:
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store atomic i32 %x, i32* %p seq_cst, align 16
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ret void
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}
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; CHECK: @AtomicStore
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; CHECK-NOT: @__msan_param_tls
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; CHECK: store i32 0, i32* {{.*}}, align 16
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; CHECK: store atomic i32 %x, i32* %p seq_cst, align 16
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; CHECK: ret void
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; atomic store: preserve alignment, store clean shadow value before app value
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define void @AtomicStoreRelease(i32* %p, i32 %x) sanitize_memory {
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entry:
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store atomic i32 %x, i32* %p release, align 16
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ret void
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}
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; CHECK: @AtomicStoreRelease
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; CHECK-NOT: @__msan_param_tls
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; CHECK: store i32 0, i32* {{.*}}, align 16
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; CHECK: store atomic i32 %x, i32* %p release, align 16
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; CHECK: ret void
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; atomic store monotonic: bumped up to store release
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define void @AtomicStoreMonotonic(i32* %p, i32 %x) sanitize_memory {
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entry:
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store atomic i32 %x, i32* %p monotonic, align 16
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ret void
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}
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; CHECK: @AtomicStoreMonotonic
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; CHECK-NOT: @__msan_param_tls
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; CHECK: store i32 0, i32* {{.*}}, align 16
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; CHECK: store atomic i32 %x, i32* %p release, align 16
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; CHECK: ret void
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; atomic store unordered: bumped up to store release
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define void @AtomicStoreUnordered(i32* %p, i32 %x) sanitize_memory {
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entry:
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store atomic i32 %x, i32* %p unordered, align 16
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ret void
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}
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; CHECK: @AtomicStoreUnordered
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; CHECK-NOT: @__msan_param_tls
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; CHECK: store i32 0, i32* {{.*}}, align 16
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; CHECK: store atomic i32 %x, i32* %p release, align 16
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; CHECK: ret void
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