Robert Lytton d072d1b2a3 Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers. ... XCore target: Add XCoreTargetTransformInfo This is where getNumberOfRegisters() resides, which in turn returns the number of vector registers (=0). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190936 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-18 12:43:35 +00:00
..
Analysis	Fix a constant folding address space place I missed.	2013-09-17 23:23:16 +00:00
AsmParser	Implement function prefix data as an IR feature.	2013-09-16 01:08:15 +00:00
Bitcode	Implement function prefix data as an IR feature.	2013-09-16 01:08:15 +00:00
CodeGen	Costmodel: Add support for horizontal vector reductions	2013-09-17 18:06:50 +00:00
DebugInfo
ExecutionEngine
IR	MemCpyOptimizer: Use max legal int size instead of pointer size	2013-09-16 22:43:16 +00:00
IRReader
Linker	Implement function prefix data as an IR feature.	2013-09-16 01:08:15 +00:00
MC	Fix X86 subtarget to not overwrite the autodetected features by calling InitMCProcessorInfo right after detecting them. Instead add a new function that only updates the scheduling model and call that.	2013-09-18 05:54:09 +00:00
Object
Option
Support	Revert r190921. It broke Windows.	2013-09-18 06:37:55 +00:00
TableGen
Target	Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers.	2013-09-18 12:43:35 +00:00
Transforms	Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers.	2013-09-18 12:43:35 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile