Adam Nemet d07494f102 [DAGCombiner] Distribute TRUNC through AND in rotation amount ...

This is already done for shifts.  Allow it for rotations as well. E.g.:

   (rotl:i32 x, (trunc (and y, 31))) -> (rotl:i32 x, (and (trunc y), 31))

Use the newly factored-out distributeTruncateThroughAnd.

With this patch and some X86.td tweaks we should be able to remove redundant
masking of the rotation amount like in the example above.  HW implicitly
performs this masking.

The testcase will be added as part of the X86 patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203316 91177308-0d34-0410-b5e6-96231b3b80d8

2014-03-07 23:56:30 +00:00

..

CMakeLists.txt

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DAGCombiner.cpp

[DAGCombiner] Distribute TRUNC through AND in rotation amount

2014-03-07 23:56:30 +00:00

FastISel.cpp

[Layering] Move DebugInfo.h into the IR library where its implementation

2014-03-06 00:46:21 +00:00

FunctionLoweringInfo.cpp

[Layering] Move DebugInfo.h into the IR library where its implementation

2014-03-06 00:46:21 +00:00

InstrEmitter.cpp

Make stackmap machineinstrs clobber the scratch regs too.

2014-03-05 07:08:16 +00:00

InstrEmitter.h

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LegalizeDAG.cpp

[Layering] Move DebugInfo.h into the IR library where its implementation

2014-03-06 00:46:21 +00:00

LegalizeFloatTypes.cpp

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LegalizeIntegerTypes.cpp

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LegalizeTypes.cpp

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LegalizeTypes.h

[AArch64 NEON] Fix pattern match failed on FP_ROUND from v1f128 to v1f64.

2014-01-26 02:19:35 +00:00

LegalizeTypesGeneric.cpp

[C++11] Replace llvm::tie with std::tie.

2014-03-02 13:30:33 +00:00

LegalizeVectorOps.cpp

[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.

2014-03-02 12:27:27 +00:00

LegalizeVectorTypes.cpp

ISel: Make VSELECT selection terminate in cases where the condition type has to

2014-03-07 23:25:55 +00:00

LLVMBuild.txt

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Makefile

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ResourcePriorityQueue.cpp

[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.

2014-03-02 12:27:27 +00:00

ScheduleDAGFast.cpp

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ScheduleDAGRRList.cpp

[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.

2014-03-02 12:27:27 +00:00

ScheduleDAGSDNodes.cpp

[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.

2014-03-02 12:27:27 +00:00

ScheduleDAGSDNodes.h

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ScheduleDAGVLIW.cpp

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SDNodeDbgValue.h

[Layering] Move DebugLoc.h into the IR library. The implementation

2014-03-05 10:30:38 +00:00

SelectionDAG.cpp

R600: Fix extloads from i8 / i16 to i64.

2014-03-06 17:34:12 +00:00

SelectionDAGBuilder.cpp

[Layering] Move DebugInfo.h into the IR library where its implementation

2014-03-06 00:46:21 +00:00

SelectionDAGBuilder.h

[Modules] Move CallSite into the IR library where it belogs. It is

2014-03-04 11:01:28 +00:00

SelectionDAGDumper.cpp

[Layering] Move DebugInfo.h into the IR library where its implementation

2014-03-06 00:46:21 +00:00

SelectionDAGISel.cpp

[Layering] Move DebugInfo.h into the IR library where its implementation

2014-03-06 00:46:21 +00:00

SelectionDAGPrinter.cpp

[Layering] Move DebugInfo.h into the IR library where its implementation

2014-03-06 00:46:21 +00:00

TargetLowering.cpp

Implement inalloca codegen for x86 with the new inalloca design

2014-01-31 23:50:57 +00:00

TargetSelectionDAGInfo.cpp

Rename some member variables from TD to DL.

2014-02-18 15:33:12 +00:00