mirror of
https://github.com/c64scene-ar/llvm-6502.git
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5a96b3dad2
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
322 lines
11 KiB
C++
322 lines
11 KiB
C++
//===-- MBlazeAsmPrinter.cpp - MBlaze LLVM assembly writer ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format MBlaze assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mblaze-asm-printer"
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#include "MBlaze.h"
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#include "MBlazeSubtarget.h"
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#include "MBlazeInstrInfo.h"
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#include "MBlazeTargetMachine.h"
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#include "MBlazeMachineFunction.h"
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#include "MBlazeMCInstLower.h"
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#include "InstPrinter/MBlazeInstPrinter.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Target/Mangler.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cctype>
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using namespace llvm;
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namespace {
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class MBlazeAsmPrinter : public AsmPrinter {
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const MBlazeSubtarget *Subtarget;
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public:
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explicit MBlazeAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
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: AsmPrinter(TM, Streamer) {
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Subtarget = &TM.getSubtarget<MBlazeSubtarget>();
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}
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virtual const char *getPassName() const {
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return "MBlaze Assembly Printer";
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}
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void printSavedRegsBitmask();
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void emitFrameDirective();
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virtual void EmitFunctionBodyStart();
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virtual void EmitFunctionBodyEnd();
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virtual void EmitFunctionEntryLabel();
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virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
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const;
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O);
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void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
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void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
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void printFSLImm(const MachineInstr *MI, int opNum, raw_ostream &O);
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void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
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const char *Modifier = 0);
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void EmitInstruction(const MachineInstr *MI);
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};
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} // end of anonymous namespace
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// #include "MBlazeGenAsmWriter.inc"
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//===----------------------------------------------------------------------===//
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//
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// MBlaze Asm Directives
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//
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// -- Frame directive "frame Stackpointer, Stacksize, RARegister"
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// Describe the stack frame.
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//
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// -- Mask directives "mask bitmask, offset"
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// Tells the assembler which registers are saved and where.
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// bitmask - contain a little endian bitset indicating which registers are
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// saved on function prologue (e.g. with a 0x80000000 mask, the
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// assembler knows the register 31 (RA) is saved at prologue.
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// offset - the position before stack pointer subtraction indicating where
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// the first saved register on prologue is located. (e.g. with a
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//
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// Consider the following function prologue:
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//
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// .frame R19,48,R15
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// .mask 0xc0000000,-8
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// addiu R1, R1, -48
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// sw R15, 40(R1)
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// sw R19, 36(R1)
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//
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// With a 0xc0000000 mask, the assembler knows the register 15 (R15) and
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// 19 (R19) are saved at prologue. As the save order on prologue is from
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// left to right, R15 is saved first. A -8 offset means that after the
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// stack pointer subtration, the first register in the mask (R15) will be
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// saved at address 48-8=40.
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//
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//===----------------------------------------------------------------------===//
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// Print a 32 bit hex number with all numbers.
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static void printHex32(unsigned int Value, raw_ostream &O) {
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O << "0x";
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for (int i = 7; i >= 0; i--)
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O.write_hex((Value & (0xF << (i*4))) >> (i*4));
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}
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// Create a bitmask with all callee saved registers for CPU or Floating Point
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// registers. For CPU registers consider RA, GP and FP for saving if necessary.
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void MBlazeAsmPrinter::printSavedRegsBitmask() {
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const TargetFrameLowering *TFI = TM.getFrameLowering();
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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// CPU Saved Registers Bitmasks
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unsigned int CPUBitmask = 0;
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// Set the CPU Bitmasks
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const MachineFrameInfo *MFI = MF->getFrameInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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unsigned Reg = CSI[i].getReg();
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unsigned RegNum = getMBlazeRegisterNumbering(Reg);
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if (MBlaze::GPRRegisterClass->contains(Reg))
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CPUBitmask |= (1 << RegNum);
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}
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// Return Address and Frame registers must also be set in CPUBitmask.
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if (TFI->hasFP(*MF))
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CPUBitmask |= (1 << getMBlazeRegisterNumbering(RI.getFrameRegister(*MF)));
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if (MFI->adjustsStack())
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CPUBitmask |= (1 << getMBlazeRegisterNumbering(RI.getRARegister()));
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// Print CPUBitmask
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OutStreamer.EmitRawText("\t.mask\t0x" + Twine::utohexstr(CPUBitmask));
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}
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/// Frame Directive
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void MBlazeAsmPrinter::emitFrameDirective() {
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if (!OutStreamer.hasRawTextSupport())
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return;
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned stkReg = RI.getFrameRegister(*MF);
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unsigned retReg = RI.getRARegister();
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unsigned stkSze = MF->getFrameInfo()->getStackSize();
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OutStreamer.EmitRawText("\t.frame\t" +
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Twine(MBlazeInstPrinter::getRegisterName(stkReg)) +
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"," + Twine(stkSze) + "," +
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Twine(MBlazeInstPrinter::getRegisterName(retReg)));
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}
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void MBlazeAsmPrinter::EmitFunctionEntryLabel() {
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if (OutStreamer.hasRawTextSupport())
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OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
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AsmPrinter::EmitFunctionEntryLabel();
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}
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void MBlazeAsmPrinter::EmitFunctionBodyStart() {
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if (!OutStreamer.hasRawTextSupport())
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return;
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emitFrameDirective();
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printSavedRegsBitmask();
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}
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void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
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if (OutStreamer.hasRawTextSupport())
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OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
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}
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//===----------------------------------------------------------------------===//
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void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this);
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MCInst TmpInst;
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MCInstLowering.Lower(MI, TmpInst);
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OutStreamer.EmitInstruction(TmpInst);
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}
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// Print out an operand for an inline asm expression.
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bool MBlazeAsmPrinter::
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PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,const char *ExtraCode, raw_ostream &O) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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printOperand(MI, OpNo, O);
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return false;
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}
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void MBlazeAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(opNum);
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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O << MBlazeInstPrinter::getRegisterName(MO.getReg());
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break;
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case MachineOperand::MO_Immediate:
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O << (int32_t)MO.getImm();
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break;
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case MachineOperand::MO_FPImmediate: {
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const ConstantFP *fp = MO.getFPImm();
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printHex32(fp->getValueAPF().bitcastToAPInt().getZExtValue(), O);
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O << ";\t# immediate = " << *fp;
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break;
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}
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case MachineOperand::MO_MachineBasicBlock:
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O << *MO.getMBB()->getSymbol();
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return;
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case MachineOperand::MO_GlobalAddress:
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O << *Mang->getSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_ExternalSymbol:
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O << *GetExternalSymbolSymbol(MO.getSymbolName());
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break;
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case MachineOperand::MO_JumpTableIndex:
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O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << MAI->getPrivateGlobalPrefix() << "CPI"
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<< getFunctionNumber() << "_" << MO.getIndex();
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if (MO.getOffset())
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O << "+" << MO.getOffset();
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break;
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default:
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llvm_unreachable("<unknown operand type>");
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}
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}
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void MBlazeAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(opNum);
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if (MO.isImm())
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O << (uint32_t)MO.getImm();
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else
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printOperand(MI, opNum, O);
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}
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void MBlazeAsmPrinter::printFSLImm(const MachineInstr *MI, int opNum,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(opNum);
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if (MO.isImm())
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O << "rfsl" << (unsigned int)MO.getImm();
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else
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printOperand(MI, opNum, O);
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}
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void MBlazeAsmPrinter::
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printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
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const char *Modifier) {
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printOperand(MI, opNum, O);
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O << ", ";
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printOperand(MI, opNum+1, O);
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}
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/// isBlockOnlyReachableByFallthough - Return true if the basic block has
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/// exactly one predecessor and the control transfer mechanism between
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/// the predecessor and this block is a fall-through.
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bool MBlazeAsmPrinter::
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isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
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// If this is a landing pad, it isn't a fall through. If it has no preds,
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// then nothing falls through to it.
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if (MBB->isLandingPad() || MBB->pred_empty())
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return false;
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// If there isn't exactly one predecessor, it can't be a fall through.
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MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI;
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++PI2;
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if (PI2 != MBB->pred_end())
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return false;
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// The predecessor has to be immediately before this block.
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const MachineBasicBlock *Pred = *PI;
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if (!Pred->isLayoutSuccessor(MBB))
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return false;
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// If the block is completely empty, then it definitely does fall through.
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if (Pred->empty())
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return true;
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// Check if the last terminator is an unconditional branch.
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MachineBasicBlock::const_iterator I = Pred->end();
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while (I != Pred->begin() && !(--I)->isTerminator())
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; // Noop
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return I == Pred->end() || !I->isBarrier();
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}
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// Force static initialization.
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extern "C" void LLVMInitializeMBlazeAsmPrinter() {
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RegisterAsmPrinter<MBlazeAsmPrinter> X(TheMBlazeTarget);
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}
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