llvm-6502/test/CodeGen
Dan Gohman 25fcaff409 LSR needs to remember inserted instructions even in postinc mode, because
there could be multiple subexpressions within a single expansion which
require insert point adjustment. This fixes PR7306.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:33:07 +00:00
..
Alpha
ARM Re-apply 105308 with fix. 2010-06-04 23:28:13 +00:00
Blackfin Start function numbering at 0. 2010-04-17 16:29:15 +00:00
CBackend
CellSPU Fix handling of 'load' nodes. 2010-06-01 13:34:47 +00:00
CPP
Generic Implement expansion in type legalization for add/sub with overflow. The 2010-06-03 03:49:50 +00:00
MBlaze
Mips Start function numbering at 0. 2010-04-17 16:29:15 +00:00
MSP430 Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), 2010-05-01 12:52:34 +00:00
PIC16
PowerPC Fix some latency computation bugs: if the use is not a machine opcode do not just return zero. 2010-05-28 23:26:21 +00:00
SPARC
SystemZ SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 2010-05-14 22:17:42 +00:00
Thumb Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
Thumb2 More tail call removal. 2010-06-04 21:14:24 +00:00
X86 LSR needs to remember inserted instructions even in postinc mode, because 2010-06-05 00:33:07 +00:00
XCore Start function numbering at 0. 2010-04-17 16:29:15 +00:00