llvm-6502/test/CodeGen
Cameron Zwarich d0aacbcc2e Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM
stores of arguments in the same cache line. This fixes the second half of
<rdar://problem/8674845>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12 02:24:17 +00:00
..
Alpha
ARM Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM 2011-04-12 02:24:17 +00:00
Blackfin
CBackend
CellSPU don't test for codegen of 'store undef' 2011-04-09 02:31:26 +00:00
CPP
Generic Fix a bug where RecursivelyDeleteTriviallyDeadInstructions could 2011-04-09 07:05:44 +00:00
MBlaze Add scheduling information for the MBlaze backend. 2011-04-11 22:31:52 +00:00
Mips Fix handling of functions with internal linkage. 2011-04-07 19:51:44 +00:00
MSP430
PowerPC These tests no longer require linear scan because reserved register coalescing is now universal. 2011-04-05 21:40:41 +00:00
PTX
SPARC These tests no longer require linear scan because reserved register coalescing is now universal. 2011-04-05 21:40:41 +00:00
SystemZ
Thumb
Thumb2 fix two completely broken tests, which were matching due to PR9629. 2011-04-09 06:34:38 +00:00
X86 look for the verboten argument slot access in any order, thanks to Frits 2011-04-09 17:00:34 +00:00
XCore