mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-23 16:30:00 +00:00
aaecc0fc08
This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each basic block in a machine function. For each basic block the instructions are processed in reversed order and if a patchpoint or stackmap instruction is encountered the current live-out register set is encoded as a register mask and attached to the instruction. Later on during stackmap generation the live-out register mask is processed and also emitted as part of the stackmap. This information is optional and intended for optimization purposes only. This will enable a client of the stackmap to reason about the registers it can use and which registers need to be preserved. Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197317 91177308-0d34-0410-b5e6-96231b3b80d8
119 lines
2.6 KiB
CMake
119 lines
2.6 KiB
CMake
add_llvm_library(LLVMCodeGen
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AggressiveAntiDepBreaker.cpp
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AllocationOrder.cpp
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Analysis.cpp
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BasicTargetTransformInfo.cpp
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BranchFolding.cpp
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CalcSpillWeights.cpp
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CallingConvLower.cpp
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CodeGen.cpp
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CriticalAntiDepBreaker.cpp
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DFAPacketizer.cpp
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DeadMachineInstructionElim.cpp
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DwarfEHPrepare.cpp
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EarlyIfConversion.cpp
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EdgeBundles.cpp
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ErlangGC.cpp
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ExecutionDepsFix.cpp
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ExpandISelPseudos.cpp
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ExpandPostRAPseudos.cpp
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GCMetadata.cpp
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GCMetadataPrinter.cpp
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GCStrategy.cpp
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IfConversion.cpp
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InlineSpiller.cpp
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InterferenceCache.cpp
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IntrinsicLowering.cpp
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JITCodeEmitter.cpp
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LLVMTargetMachine.cpp
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LatencyPriorityQueue.cpp
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LexicalScopes.cpp
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LiveDebugVariables.cpp
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LiveInterval.cpp
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LiveIntervalAnalysis.cpp
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LiveIntervalUnion.cpp
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LiveRangeCalc.cpp
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LiveRangeEdit.cpp
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LiveRegMatrix.cpp
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LivePhysRegs.cpp
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LiveStackAnalysis.cpp
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LiveVariables.cpp
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LocalStackSlotAllocation.cpp
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MachineBasicBlock.cpp
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MachineBlockFrequencyInfo.cpp
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MachineBlockPlacement.cpp
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MachineBranchProbabilityInfo.cpp
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MachineCSE.cpp
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MachineCodeEmitter.cpp
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MachineCopyPropagation.cpp
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MachineDominators.cpp
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MachineFunction.cpp
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MachineFunctionAnalysis.cpp
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MachineFunctionPass.cpp
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MachineFunctionPrinterPass.cpp
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MachineInstr.cpp
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MachineInstrBundle.cpp
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MachineLICM.cpp
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MachineLoopInfo.cpp
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MachineModuleInfo.cpp
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MachineModuleInfoImpls.cpp
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MachinePassRegistry.cpp
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MachinePostDominators.cpp
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MachineRegisterInfo.cpp
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MachineSSAUpdater.cpp
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MachineScheduler.cpp
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MachineSink.cpp
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MachineTraceMetrics.cpp
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MachineVerifier.cpp
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OcamlGC.cpp
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OptimizePHIs.cpp
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PHIElimination.cpp
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PHIEliminationUtils.cpp
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Passes.cpp
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PeepholeOptimizer.cpp
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PostRASchedulerList.cpp
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ProcessImplicitDefs.cpp
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PrologEpilogInserter.cpp
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PseudoSourceValue.cpp
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RegAllocBase.cpp
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RegAllocBasic.cpp
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RegAllocFast.cpp
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RegAllocGreedy.cpp
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RegAllocPBQP.cpp
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RegisterClassInfo.cpp
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RegisterCoalescer.cpp
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RegisterPressure.cpp
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RegisterScavenging.cpp
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ScheduleDAG.cpp
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ScheduleDAGInstrs.cpp
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ScheduleDAGPrinter.cpp
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ScoreboardHazardRecognizer.cpp
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ShadowStackGC.cpp
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SjLjEHPrepare.cpp
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SlotIndexes.cpp
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SpillPlacement.cpp
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Spiller.cpp
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SplitKit.cpp
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StackColoring.cpp
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StackProtector.cpp
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StackSlotColoring.cpp
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StackMapLivenessAnalysis.cpp
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StackMaps.cpp
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TailDuplication.cpp
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TargetFrameLoweringImpl.cpp
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TargetInstrInfo.cpp
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TargetLoweringBase.cpp
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TargetLoweringObjectFileImpl.cpp
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TargetOptionsImpl.cpp
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TargetRegisterInfo.cpp
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TargetSchedule.cpp
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TwoAddressInstructionPass.cpp
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UnreachableBlockElim.cpp
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VirtRegMap.cpp
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)
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add_dependencies(LLVMCodeGen intrinsics_gen)
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add_subdirectory(SelectionDAG)
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add_subdirectory(AsmPrinter)
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