Alex Lorenz d0ef9f3115 MIR Parser: Verify the implicit machine register operands. ...

This commit verifies that the parsed machine instructions contain the implicit
register operands as specified by the MCInstrDesc. Variadic and call
instructions aren't verified.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10781


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241537 91177308-0d34-0410-b5e6-96231b3b80d8

2015-07-07 02:08:46 +00:00

..

Analysis

IR: Do not consider available_externally linkage to be linker-weak.

2015-07-05 20:52:35 +00:00

AsmParser

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Bitcode

Remove always-true comparison, NFC.

2015-07-03 20:12:01 +00:00

CodeGen

MIR Parser: Verify the implicit machine register operands.

2015-07-07 02:08:46 +00:00

DebugInfo

Return ErrorOr from getSymbolAddress.

2015-07-03 18:19:00 +00:00

ExecutionEngine

Remove getRelocationAddress.

2015-07-06 14:55:37 +00:00

Fuzzer

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IR

DIBuilder: Don't rauw null pointers with empty arrays in finalize().

2015-07-06 16:36:02 +00:00

IRReader

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LibDriver

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LineEditor

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Linker

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LTO

LTO: expose LTO_SYMBOL_ALIAS, which indicates that the symbol is an alias.

2015-07-04 03:42:35 +00:00

MC

Change the last few internal StringRef triples into Triple objects.

2015-07-06 16:56:07 +00:00

Object

Remove getRelocationAddress.

2015-07-06 14:55:37 +00:00

Option

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Passes

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ProfileData

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Support

[Triple] Add a helper to switch between big/little endian variants

2015-07-06 23:58:14 +00:00

TableGen

[TableGen] Change a couple methods to return an ArrayRef instead of a const std::vector reference. NFC

2015-07-06 06:23:01 +00:00

Target

[X86][AVX] Add support for shuffle decoding of vperm2f128/vperm2i128 with zero'd lanes

2015-07-06 22:46:46 +00:00

Transforms

[llvm-extract] Drop comdats from declarations

2015-07-06 18:48:02 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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