Misha Brukman d15cd2752f I have finally seen the light. The code to change the opcode must live higher in ... the loop, and in both cases. In the first case, it is a VReg that is a constant so it may be actually converted to a constant. In the second case, it is already a constant, but then if it doesn't change its type (e.g. to become a register and have the value loaded from memory if it is too large to live in its instruction field), we must change the opcode BEFORE the 'continue', otherwise we miss the opportunity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6602 91177308-0d34-0410-b5e6-96231b3b80d8		2003-06-04 04:54:06 +00:00
..
InstrSched	Remove usage of noncopyable classes to clean up doxygen output.	2003-06-02 22:45:07 +00:00
InstrSelection	I have finally seen the light. The code to change the opcode must live higher in	2003-06-04 04:54:06 +00:00
LiveVar
ModuloScheduling	compiled with the new SchedGraphCommon	2003-06-02 17:48:56 +00:00
RegAlloc	Minor changes.	2003-05-31 07:41:54 +00:00
.cvsignore	Since there is now another derived .inc file, ignore them all.	2003-05-29 20:15:27 +00:00
EmitBytecodeToAssembly.cpp
MachineCodeForInstruction.h
MachineFunctionInfo.h
MachineInstrAnnot.h	Renamed a variable.	2003-05-31 07:43:41 +00:00
Makefile	Use the new -o tablegen option	2003-06-03 05:06:33 +00:00
MappingInfo.cpp	Make the write*map methods more self-contained. Document some more.	2003-06-03 19:30:15 +00:00
MappingInfo.h
SparcV9_F2.td	The rd field goes after the immediate field in format 2.1 instructions.	2003-06-03 01:04:04 +00:00
SparcV9_F3.td	Added instruction format class 3.15 and floating-point compare instructions.	2003-06-04 02:26:14 +00:00
SparcV9_F4.td	Added the 4.7 instruction class and all the FMOVcc instructions in them.	2003-06-04 04:48:31 +00:00
SparcV9_Reg.td	* Broke up SparcV9.td into separate files as it was getting unmanageable	2003-05-29 03:31:43 +00:00
SparcV9.burg.in
SparcV9.td	Added the 4.7 instruction class and all the FMOVcc instructions in them.	2003-06-04 04:48:31 +00:00
SparcV9AsmPrinter.cpp	Reverting previous beautification changes.	2003-05-31 07:27:17 +00:00
SparcV9CodeEmitter.cpp	Constants are laid out in memory in PC-relative form.	2003-06-03 03:24:12 +00:00
SparcV9CodeEmitter.h	Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken	2003-06-02 04:12:39 +00:00
SparcV9Instr.def	Added MOVR (move int reg on register condition), aka comparison with zero.	2003-06-02 21:16:54 +00:00
SparcV9InstrInfo.cpp	Convert load/store opcodes from register to immediate forms, if necessary.	2003-06-03 03:20:57 +00:00
SparcV9InstrSelection.cpp	* Convert load/store opcodes from register to immediate forms.	2003-06-03 03:21:58 +00:00
SparcV9InstrSelectionSupport.h	Added opcode conversion for conditional move of integers.	2003-06-03 03:23:35 +00:00
SparcV9Internals.h	Extensive changes to the way code generation occurs for function	2003-05-31 07:32:01 +00:00
SparcV9PeepholeOpts.cpp
SparcV9PreSelection.cpp	Avoid generating a getelementptr instruction of a function	2003-06-04 01:24:40 +00:00
SparcV9PrologEpilogInserter.cpp	Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.	2003-05-27 22:35:43 +00:00
SparcV9RegClassInfo.cpp
SparcV9RegClassInfo.h
SparcV9RegInfo.cpp	Add map info for arguments to call (copies)	2003-06-01 02:48:23 +00:00
SparcV9SchedInfo.cpp
SparcV9StackSlots.cpp
SparcV9TargetMachine.cpp	Enabling some of these passes causes lli to break	2003-05-31 04:23:04 +00:00