llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-03 08:55:51 +00:00

History

Chris Lattner d1947ed2f8 supplement CurrentFnName with CurrentFnSym, which will eventually replace it. Upgrade Alpha, Blackfin, and part of CellSPU to not use mangler anymore. CellSPU needs more invasive surgery. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93589 91177308-0d34-0410-b5e6-96231b3b80d8		2010-01-15 23:55:16 +00:00
..
AsmPrinter	supplement CurrentFnName with CurrentFnSym, which will eventually	2010-01-15 23:55:16 +00:00
TargetInfo
Alpha.h
Alpha.td
AlphaBranchSelector.cpp
AlphaCallingConv.td
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of	2009-12-05 00:44:40 +00:00
AlphaInstrInfo.h	Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of	2009-12-05 00:44:40 +00:00
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp	Change SelectCode's argument from SDValue to SDNode *, to make it more	2010-01-05 01:24:18 +00:00
AlphaISelLowering.cpp	Remove dead variable.	2009-12-28 02:00:30 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp	Change indirect-globals to use a dedicated allocIndirectGV. This lets us	2009-12-15 22:42:46 +00:00
AlphaJITInfo.h	* Move stub allocation inside the JITEmitter, instead of exposing a	2009-11-23 23:35:19 +00:00
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp
AlphaMCAsmInfo.h
AlphaRegisterInfo.cpp	Make the MachineFunction argument of getFrameRegister const.	2009-11-12 21:00:03 +00:00
AlphaRegisterInfo.h	Make the MachineFunction argument of getFrameRegister const.	2009-11-12 21:00:03 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetMachine.cpp
AlphaTargetMachine.h
CMakeLists.txt
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html