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https://github.com/c64scene-ar/llvm-6502.git
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1ef70ff39b
Now that `Metadata` is typeless, reflect that in the assembly. These
are the matching assembly changes for the metadata/value split in
r223802.
- Only use the `metadata` type when referencing metadata from a call
intrinsic -- i.e., only when it's used as a `Value`.
- Stop pretending that `ValueAsMetadata` is wrapped in an `MDNode`
when referencing it from call intrinsics.
So, assembly like this:
define @foo(i32 %v) {
call void @llvm.foo(metadata !{i32 %v}, metadata !0)
call void @llvm.foo(metadata !{i32 7}, metadata !0)
call void @llvm.foo(metadata !1, metadata !0)
call void @llvm.foo(metadata !3, metadata !0)
call void @llvm.foo(metadata !{metadata !3}, metadata !0)
ret void, !bar !2
}
!0 = metadata !{metadata !2}
!1 = metadata !{i32* @global}
!2 = metadata !{metadata !3}
!3 = metadata !{}
turns into this:
define @foo(i32 %v) {
call void @llvm.foo(metadata i32 %v, metadata !0)
call void @llvm.foo(metadata i32 7, metadata !0)
call void @llvm.foo(metadata i32* @global, metadata !0)
call void @llvm.foo(metadata !3, metadata !0)
call void @llvm.foo(metadata !{!3}, metadata !0)
ret void, !bar !2
}
!0 = !{!2}
!1 = !{i32* @global}
!2 = !{!3}
!3 = !{}
I wrote an upgrade script that handled almost all of the tests in llvm
and many of the tests in cfe (even handling many `CHECK` lines). I've
attached it (or will attach it in a moment if you're speedy) to PR21532
to help everyone update their out-of-tree testcases.
This is part of PR21532.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224257 91177308-0d34-0410-b5e6-96231b3b80d8
173 lines
5.7 KiB
LLVM
173 lines
5.7 KiB
LLVM
; RUN: llc < %s
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; PR13377
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
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target triple = "armv7-none-linux-gnueabi"
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%0 = type { <4 x float> }
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define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable {
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br i1 undef, label %4, label %5
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; <label>:4 ; preds = %3
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unreachable
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; <label>:5 ; preds = %3
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br i1 undef, label %7, label %6
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; <label>:6 ; preds = %5
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unreachable
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; <label>:7 ; preds = %5
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br i1 undef, label %8, label %10
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; <label>:8 ; preds = %7
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br i1 undef, label %9, label %10
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; <label>:9 ; preds = %8
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br i1 undef, label %11, label %10
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; <label>:10 ; preds = %9, %8, %7
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unreachable
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; <label>:11 ; preds = %9
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br i1 undef, label %13, label %12
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; <label>:12 ; preds = %11
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unreachable
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; <label>:13 ; preds = %11
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br i1 undef, label %15, label %14
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; <label>:14 ; preds = %13
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unreachable
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; <label>:15 ; preds = %13
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br i1 undef, label %18, label %16
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; <label>:16 ; preds = %15
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br i1 undef, label %17, label %18
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; <label>:17 ; preds = %16
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unreachable
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; <label>:18 ; preds = %16, %15
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br i1 undef, label %68, label %19
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; <label>:19 ; preds = %18
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br label %20
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; <label>:20 ; preds = %20, %19
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br i1 undef, label %21, label %20
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; <label>:21 ; preds = %20
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br i1 undef, label %22, label %68
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; <label>:22 ; preds = %21
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br i1 undef, label %23, label %24
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; <label>:23 ; preds = %22
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unreachable
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; <label>:24 ; preds = %22
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br i1 undef, label %26, label %25
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; <label>:25 ; preds = %24
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unreachable
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; <label>:26 ; preds = %24
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br i1 undef, label %28, label %27
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; <label>:27 ; preds = %26
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unreachable
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; <label>:28 ; preds = %26
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br i1 undef, label %29, label %30, !prof !0
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; <label>:29 ; preds = %28
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br label %30
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; <label>:30 ; preds = %29, %28
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br i1 undef, label %31, label %32, !prof !0
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; <label>:31 ; preds = %30
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br label %32
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; <label>:32 ; preds = %31, %30
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br i1 undef, label %34, label %33
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; <label>:33 ; preds = %32
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unreachable
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; <label>:34 ; preds = %32
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br i1 undef, label %35, label %36, !prof !0
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; <label>:35 ; preds = %34
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br label %36
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; <label>:36 ; preds = %35, %34
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br i1 undef, label %37, label %38, !prof !0
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; <label>:37 ; preds = %36
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br label %38
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; <label>:38 ; preds = %37, %36
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br i1 undef, label %39, label %67
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; <label>:39 ; preds = %38
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br i1 undef, label %40, label %41
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; <label>:40 ; preds = %39
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br i1 undef, label %64, label %41
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; <label>:41 ; preds = %40, %39
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br i1 undef, label %64, label %42
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; <label>:42 ; preds = %41
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%43 = fadd <4 x float> undef, undef
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%44 = fadd <4 x float> undef, undef
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%45 = fmul <4 x float> undef, undef
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%46 = fmul <4 x float> %45, %43
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%47 = fmul <4 x float> undef, %44
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%48 = load <4 x float>* undef, align 8
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%49 = bitcast <4 x float> %48 to <2 x i64>
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%50 = shufflevector <2 x i64> %49, <2 x i64> undef, <1 x i32> <i32 1>
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%51 = bitcast <1 x i64> %50 to <2 x float>
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%52 = shufflevector <2 x float> %51, <2 x float> undef, <4 x i32> zeroinitializer
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%53 = bitcast <4 x float> %52 to <2 x i64>
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%54 = shufflevector <2 x i64> %53, <2 x i64> undef, <1 x i32> zeroinitializer
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%55 = bitcast <1 x i64> %54 to <2 x float>
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%56 = extractelement <2 x float> %55, i32 0
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%57 = insertelement <4 x float> undef, float %56, i32 2
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%58 = insertelement <4 x float> %57, float 1.000000e+00, i32 3
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%59 = fsub <4 x float> %47, %58
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%60 = fmul <4 x float> undef, undef
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%61 = fmul <4 x float> %59, %60
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%62 = fmul <4 x float> %61, <float 6.000000e+01, float 6.000000e+01, float 6.000000e+01, float 6.000000e+01>
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%63 = fadd <4 x float> %47, %62
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store <4 x float> %46, <4 x float>* undef, align 8
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call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind
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call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind
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store <4 x float> %63, <4 x float>* undef, align 8
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unreachable
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; <label>:64 ; preds = %41, %40
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br i1 undef, label %65, label %66
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; <label>:65 ; preds = %64
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unreachable
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; <label>:66 ; preds = %64
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unreachable
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; <label>:67 ; preds = %38
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unreachable
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; <label>:68 ; preds = %21, %18
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ret void
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}
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declare arm_aapcs_vfpcc void @bar(%0*, float)
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!0 = !{!"branch_weights", i32 64, i32 4}
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