llvm-6502/lib/Target
Duraid Madina d1eda6d155 add zeroextend predicate->integer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 01:29:55 +00:00
..
Alpha If the module has no t-t and the host is an alpha, default to using the Alpha BE 2005-10-30 16:44:01 +00:00
CBackend fix CBackend/2005-09-27-VolatileFuncPtr.ll 2005-09-27 20:52:44 +00:00
IA64 add zeroextend predicate->integer 2005-11-01 01:29:55 +00:00
PowerPC Add a flag to enable a darwin linker optimization 2005-11-01 00:12:36 +00:00
Skeleton CR registers are not used by this "target" 2005-09-30 06:43:58 +00:00
Sparc remove reference to this pass 2005-10-29 05:28:34 +00:00
SparcV8 remove reference to this pass 2005-10-29 05:28:34 +00:00
SparcV9 There is no need to build an archive version of this library 2005-10-24 02:09:03 +00:00
X86 add a note that Nate mentioned last week 2005-10-23 21:44:59 +00:00
Makefile DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now 2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Preparation of supporting scheduling info. Need to find info based on selected 2005-10-25 15:15:28 +00:00
Target.td Add attribute name and type to SubtargetFeatures. 2005-10-26 17:28:23 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td add a marker 2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td Add nodes for CondCodeSDNode and setcc, and add a bunch of pattern fragments 2005-10-26 17:00:25 +00:00
TargetSubtarget.cpp