Nate Begeman 144ff660e6 Add support to Legalize for expanding i64 sextload/zextload into hi and lo ... parts. This should fix the crafty and signed long long unit test failure on x86 last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23711 91177308-0d34-0410-b5e6-96231b3b80d8		2005-10-13 17:15:37 +00:00
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SelectionDAG	Add support to Legalize for expanding i64 sextload/zextload into hi and lo	2005-10-13 17:15:37 +00:00
AsmPrinter.cpp
BranchFolding.cpp
ELFWriter.cpp
IntrinsicLowering.cpp
LiveInterval.cpp
LiveIntervalAnalysis.cpp
LiveVariables.cpp
MachineBasicBlock.cpp
MachineCodeEmitter.cpp
MachineFunction.cpp	Added graphviz/gv support for MF.	2005-10-12 12:09:05 +00:00
MachineInstr.cpp
Makefile
Passes.cpp
PHIElimination.cpp	clean up this code a bit, no functionality change	2005-10-03 07:22:07 +00:00
PhysRegTracker.h
PrologEpilogInserter.cpp	now that we have a reg class to spill with, get this info from the regclass	2005-09-30 17:19:22 +00:00
RegAllocIterativeScan.cpp
RegAllocLinearScan.cpp
RegAllocLocal.cpp	Change this code ot pass register classes into the stack slot spiller/reloader	2005-09-30 01:29:00 +00:00
RegAllocSimple.cpp	Change this code ot pass register classes into the stack slot spiller/reloader	2005-09-30 01:29:00 +00:00
TwoAddressInstructionPass.cpp
UnreachableBlockElim.cpp
VirtRegMap.cpp	Fix the LLC regressions on X86 last night. In particular, when undoing	2005-10-06 17:19:06 +00:00
VirtRegMap.h