Tom Stellard d2442c10f9 R600/SI: Add double precision fsub pattern for SI ...

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186179 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-12 18:15:08 +00:00

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AArch64

Start using CHECK-LABEL in some tests.

2013-07-12 14:54:12 +00:00

ARM

Start using CHECK-LABEL in some tests.

2013-07-12 14:54:12 +00:00

CPP

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Generic

Debug Info: clean up usage of Verify.

2013-06-28 05:43:10 +00:00

Hexagon

Hexagon: Pass to replace tranfer/copy instructions into combine instruction

2013-05-14 18:54:06 +00:00

Inputs

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MBlaze

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Mips

[mips] Fix test case to check that mips64 instructions are generated.

2013-07-01 20:18:58 +00:00

MSP430

Really fix the test. Sorry for the breakage...

2013-07-01 19:51:36 +00:00

NVPTX

[NVPTX] Add support for module-scope inline asm

2013-07-01 13:00:14 +00:00

PowerPC

Start using CHECK-LABEL in some tests.

2013-07-12 14:54:12 +00:00

R600

R600/SI: Add double precision fsub pattern for SI

2013-07-12 18:15:08 +00:00

SI

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SPARC

Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.

2013-06-17 19:00:36 +00:00

SystemZ

[SystemZ] Add test missing from r186148

2013-07-12 09:20:14 +00:00

Thumb

LocalStackSlotAllocation improvements

2013-04-30 20:04:37 +00:00

Thumb2

ARM: Fix incorrect pack pattern for thumb2

2013-07-09 22:59:22 +00:00

X86

X86: Shrink certain forms of movsx.

2013-07-12 18:06:44 +00:00

XCore

[XCore] Add ISel pattern for LDWCP

2013-07-03 07:48:50 +00:00