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d24479730a
target directories themselves. This also means that VMCore no longer needs to know about every target's list of intrinsics. Future work will include converting the PowerPC target to this interface as an example implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63765 91177308-0d34-0410-b5e6-96231b3b80d8
352 lines
13 KiB
C++
352 lines
13 KiB
C++
//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the TargetMachine and LLVMTargetMachine classes.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETMACHINE_H
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#define LLVM_TARGET_TARGETMACHINE_H
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#include "llvm/Target/TargetInstrItineraries.h"
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#include <cassert>
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namespace llvm {
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class TargetAsmInfo;
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class TargetData;
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class TargetSubtarget;
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class TargetInstrInfo;
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class TargetIntrinsicInfo;
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class TargetJITInfo;
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class TargetLowering;
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class TargetFrameInfo;
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class MachineCodeEmitter;
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class TargetRegisterInfo;
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class Module;
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class PassManagerBase;
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class PassManager;
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class Pass;
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class TargetMachOWriterInfo;
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class TargetELFWriterInfo;
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class raw_ostream;
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// Relocation model types.
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namespace Reloc {
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enum Model {
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Default,
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Static,
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PIC_, // Cannot be named PIC due to collision with -DPIC
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DynamicNoPIC
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};
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}
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// Code model types.
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namespace CodeModel {
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enum Model {
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Default,
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Small,
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Kernel,
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Medium,
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Large
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};
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}
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namespace FileModel {
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enum Model {
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Error,
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None,
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AsmFile,
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MachOFile,
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ElfFile
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};
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}
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//===----------------------------------------------------------------------===//
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///
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/// TargetMachine - Primary interface to the complete machine description for
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/// the target machine. All target-specific information should be accessible
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/// through this interface.
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///
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class TargetMachine {
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TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
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void operator=(const TargetMachine &); // DO NOT IMPLEMENT
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protected: // Can only create subclasses.
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TargetMachine() : AsmInfo(0) { }
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/// getSubtargetImpl - virtual method implemented by subclasses that returns
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/// a reference to that target's TargetSubtarget-derived member variable.
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virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
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/// AsmInfo - Contains target specific asm information.
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///
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mutable const TargetAsmInfo *AsmInfo;
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/// createTargetAsmInfo - Create a new instance of target specific asm
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/// information.
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virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
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public:
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virtual ~TargetMachine();
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/// getModuleMatchQuality - This static method should be implemented by
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/// targets to indicate how closely they match the specified module. This is
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/// used by the LLC tool to determine which target to use when an explicit
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/// -march option is not specified. If a target returns zero, it will never
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/// be chosen without an explicit -march option.
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static unsigned getModuleMatchQuality(const Module &) { return 0; }
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/// getJITMatchQuality - This static method should be implemented by targets
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/// that provide JIT capabilities to indicate how suitable they are for
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/// execution on the current host. If a value of 0 is returned, the target
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/// will not be used unless an explicit -march option is used.
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static unsigned getJITMatchQuality() { return 0; }
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// Interfaces to the major aspects of target machine information:
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// -- Instruction opcode and operand information
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// -- Pipelines and scheduling information
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// -- Stack frame information
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// -- Selection DAG lowering information
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//
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virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
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virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
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virtual TargetLowering *getTargetLowering() const { return 0; }
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virtual const TargetData *getTargetData() const { return 0; }
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/// getTargetAsmInfo - Return target specific asm information.
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///
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const TargetAsmInfo *getTargetAsmInfo() const {
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if (!AsmInfo) AsmInfo = createTargetAsmInfo();
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return AsmInfo;
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}
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/// getSubtarget - This method returns a pointer to the specified type of
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/// TargetSubtarget. In debug builds, it verifies that the object being
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/// returned is of the correct type.
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template<typename STC> const STC &getSubtarget() const {
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const TargetSubtarget *TST = getSubtargetImpl();
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assert(TST && dynamic_cast<const STC*>(TST) &&
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"Not the right kind of subtarget!");
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return *static_cast<const STC*>(TST);
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}
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/// getRegisterInfo - If register information is available, return it. If
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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/// details of graph coloring register allocation removed from it.
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///
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virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
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/// getIntrinsicInfo - If intrinsic information is available, return it. If
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/// not, return null.
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///
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virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
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/// getJITInfo - If this target supports a JIT, return information for it,
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/// otherwise return null.
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///
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virtual TargetJITInfo *getJITInfo() { return 0; }
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/// getInstrItineraryData - Returns instruction itinerary data for the target
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/// or specific subtarget.
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///
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virtual const InstrItineraryData getInstrItineraryData() const {
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return InstrItineraryData();
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}
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/// getMachOWriterInfo - If this target supports a Mach-O writer, return
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/// information for it, otherwise return null.
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///
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virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
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/// getELFWriterInfo - If this target supports an ELF writer, return
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/// information for it, otherwise return null.
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///
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virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
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/// getRelocationModel - Returns the code generation relocation model. The
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/// choices are static, PIC, and dynamic-no-pic, and target default.
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static Reloc::Model getRelocationModel();
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/// setRelocationModel - Sets the code generation relocation model.
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static void setRelocationModel(Reloc::Model Model);
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/// getCodeModel - Returns the code model. The choices are small, kernel,
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/// medium, large, and target default.
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static CodeModel::Model getCodeModel();
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/// setCodeModel - Sets the code model.
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static void setCodeModel(CodeModel::Model Model);
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/// CodeGenFileType - These enums are meant to be passed into
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/// addPassesToEmitFile to indicate what type of file to emit.
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enum CodeGenFileType {
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AssemblyFile, ObjectFile, DynamicLibrary
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};
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/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
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/// on this target. User flag overrides.
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virtual bool getEnableTailMergeDefault() const { return true; }
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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/// specified file emitted. Typically this will involve several steps of code
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/// generation. If Fast is set to true, the code generator should emit code
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/// as fast as possible, though the generated code may be less efficient.
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/// This method should return FileModel::Error if emission of this file type
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/// is not supported.
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///
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virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
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raw_ostream &,
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CodeGenFileType,
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bool /*Fast*/) {
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return FileModel::None;
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}
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/// addPassesToEmitFileFinish - If the passes to emit the specified file had
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/// to be split up (e.g., to add an object writer pass), this method can be
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/// used to finish up adding passes to emit the file, if necessary.
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///
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virtual bool addPassesToEmitFileFinish(PassManagerBase &,
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MachineCodeEmitter *, bool /*Fast*/) {
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return true;
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}
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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/// get machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(PassManagerBase &,
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MachineCodeEmitter &,
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bool /*Fast*/) {
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return true;
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}
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/// addPassesToEmitWholeFile - This method can be implemented by targets that
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/// require having the entire module at once. This is not recommended, do not
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/// use this.
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virtual bool WantsWholeFile() const { return false; }
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virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
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CodeGenFileType, bool /*Fast*/) {
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return true;
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}
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};
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/// LLVMTargetMachine - This class describes a target machine that is
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/// implemented with the LLVM target-independent code generator.
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///
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class LLVMTargetMachine : public TargetMachine {
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protected: // Can only create subclasses.
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LLVMTargetMachine() { }
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/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
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/// both emitting to assembly files or machine code output.
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///
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bool addCommonCodeGenPasses(PassManagerBase &, bool /*Fast*/);
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public:
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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/// specified file emitted. Typically this will involve several steps of code
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/// generation. If Fast is set to true, the code generator should emit code
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/// as fast as possible, though the generated code may be less efficient.
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/// This method should return FileModel::Error if emission of this file type
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/// is not supported.
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///
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/// The default implementation of this method adds components from the
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/// LLVM retargetable code generator, invoking the methods below to get
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/// target-specific passes in standard locations.
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///
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virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
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raw_ostream &Out,
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CodeGenFileType FileType,
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bool Fast);
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/// addPassesToEmitFileFinish - If the passes to emit the specified file had
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/// to be split up (e.g., to add an object writer pass), this method can be
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/// used to finish up adding passes to emit the file, if necessary.
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///
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virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
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MachineCodeEmitter *MCE, bool Fast);
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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/// get machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
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MachineCodeEmitter &MCE, bool Fast);
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/// Target-Independent Code Generator Pass Configuration Options.
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/// addInstSelector - This method should add any "last minute" LLVM->LLVM
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/// passes, then install an instruction selector pass, which converts from
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/// LLVM code to machine instructions.
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virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) {
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return true;
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}
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/// addPreRegAllocPasses - This method may be implemented by targets that want
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/// to run passes immediately before register allocation. This should return
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/// true if -print-machineinstrs should print after these passes.
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virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) {
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return false;
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}
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/// addPostRegAllocPasses - This method may be implemented by targets that
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/// want to run passes after register allocation but before prolog-epilog
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/// insertion. This should return true if -print-machineinstrs should print
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/// after these passes.
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virtual bool addPostRegAlloc(PassManagerBase &, bool /*Fast*/) {
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return false;
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}
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/// addPreEmitPass - This pass may be implemented by targets that want to run
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/// passes immediately before machine code is emitted. This should return
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/// true if -print-machineinstrs should print out the code after the passes.
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virtual bool addPreEmitPass(PassManagerBase &, bool /*Fast*/) {
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return false;
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}
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/// addAssemblyEmitter - This pass should be overridden by the target to add
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/// the asmprinter, if asm emission is supported. If this is not supported,
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/// 'true' should be returned.
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virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
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raw_ostream &) {
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return true;
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}
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/// addCodeEmitter - This pass should be overridden by the target to add a
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/// code emitter, if supported. If this is not supported, 'true' should be
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/// returned. If DumpAsm is true, the generated assembly is printed to cerr.
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virtual bool addCodeEmitter(PassManagerBase &, bool /*Fast*/,
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bool /*DumpAsm*/, MachineCodeEmitter &) {
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return true;
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}
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/// addSimpleCodeEmitter - This pass should be overridden by the target to add
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/// a code emitter (without setting flags), if supported. If this is not
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/// supported, 'true' should be returned. If DumpAsm is true, the generated
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/// assembly is printed to cerr.
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virtual bool addSimpleCodeEmitter(PassManagerBase &, bool /*Fast*/,
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bool /*DumpAsm*/, MachineCodeEmitter &) {
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return true;
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}
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/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
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/// on this target. User flag overrides.
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virtual bool getEnableTailMergeDefault() const { return true; }
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};
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} // End llvm namespace
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#endif
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