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This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
1.7 KiB
LLVM
52 lines
1.7 KiB
LLVM
; RUN: llc -mtriple=arm64-none-linux-gnu -o - < %s | FileCheck %s
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; RUN: llc -mtriple=arm64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s
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declare extern_weak i32 @var()
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define i32()* @foo() {
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; The usual ADRP/ADD pair can't be used for a weak reference because it must
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; evaluate to 0 if the symbol is undefined. We use a litpool entry.
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ret i32()* @var
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; CHECK: adrp x[[VAR:[0-9]+]], :got:var
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; CHECK: ldr x0, [x[[VAR]], :got_lo12:var]
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; In the large model, the usual relocations are absolute and can
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; materialise 0.
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; CHECK-LARGE: movz x0, #:abs_g3:var
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; CHECK-LARGE: movk x0, #:abs_g2_nc:var
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; CHECK-LARGE: movk x0, #:abs_g1_nc:var
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; CHECK-LARGE: movk x0, #:abs_g0_nc:var
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}
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@arr_var = extern_weak global [10 x i32]
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define i32* @bar() {
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%addr = getelementptr [10 x i32]* @arr_var, i32 0, i32 5
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; CHECK: adrp x[[ARR_VAR_HI:[0-9]+]], :got:arr_var
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; CHECK: ldr [[ARR_VAR:x[0-9]+]], [x[[ARR_VAR_HI]], :got_lo12:arr_var]
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; CHECK: add x0, [[ARR_VAR]], #20
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ret i32* %addr
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; In the large model, the usual relocations are absolute and can
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; materialise 0.
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; CHECK-LARGE: movz [[ARR_VAR:x[0-9]+]], #:abs_g3:arr_var
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; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g2_nc:arr_var
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; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g1_nc:arr_var
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; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g0_nc:arr_var
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}
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@defined_weak_var = internal unnamed_addr global i32 0
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define i32* @wibble() {
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ret i32* @defined_weak_var
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; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
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; CHECK: add x0, [[BASE]], :lo12:defined_weak_var
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; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var
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; CHECK-LARGE: movk x0, #:abs_g2_nc:defined_weak_var
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; CHECK-LARGE: movk x0, #:abs_g1_nc:defined_weak_var
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; CHECK-LARGE: movk x0, #:abs_g0_nc:defined_weak_var
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}
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