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https://github.com/c64scene-ar/llvm-6502.git
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c3cee57f7d
We used to generate the compact unwind encoding from the machine instructions. However, this had the problem that if the user used `-save-temps' or compiled their hand-written `.s' file (with CFI directives), we wouldn't generate the compact unwind encoding. Move the algorithm that generates the compact unwind encoding into the MCAsmBackend. This way we can generate the encoding whether the code is from a `.ll' or `.s' file. <rdar://problem/13623355> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190290 91177308-0d34-0410-b5e6-96231b3b80d8
104 lines
3.4 KiB
C++
104 lines
3.4 KiB
C++
//===-- AMDGPUAsmBackend.cpp - AMDGPU Assembler Backend -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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/// \file
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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namespace {
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class AMDGPUMCObjectWriter : public MCObjectWriter {
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public:
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AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { }
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virtual void ExecutePostLayoutBinding(MCAssembler &Asm,
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const MCAsmLayout &Layout) {
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//XXX: Implement if necessary.
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}
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virtual void RecordRelocation(const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue) {
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assert(!"Not implemented");
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}
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virtual void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout);
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};
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class AMDGPUAsmBackend : public MCAsmBackend {
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public:
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AMDGPUAsmBackend(const Target &T)
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: MCAsmBackend() {}
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virtual unsigned getNumFixupKinds() const { return 0; };
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virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value) const;
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virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const {
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return false;
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}
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virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
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assert(!"Not implemented");
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}
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virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
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virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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return true;
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}
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};
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} //End anonymous namespace
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void AMDGPUMCObjectWriter::WriteObject(MCAssembler &Asm,
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const MCAsmLayout &Layout) {
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for (MCAssembler::iterator I = Asm.begin(), E = Asm.end(); I != E; ++I) {
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Asm.writeSectionData(I, Layout);
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}
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}
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void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
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unsigned DataSize, uint64_t Value) const {
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uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset());
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assert(Fixup.getKind() == FK_PCRel_4);
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*Dst = (Value - 4) / 4;
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}
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//===----------------------------------------------------------------------===//
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// ELFAMDGPUAsmBackend class
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//===----------------------------------------------------------------------===//
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namespace {
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class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
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public:
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ELFAMDGPUAsmBackend(const Target &T) : AMDGPUAsmBackend(T) { }
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createAMDGPUELFObjectWriter(OS);
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}
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};
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} // end anonymous namespace
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MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T,
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const MCRegisterInfo &MRI,
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StringRef TT,
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StringRef CPU) {
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return new ELFAMDGPUAsmBackend(T);
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}
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