llvm-6502/test/CodeGen
Andrea Di Biagio d288259ccd [X86][AVX] Fix wrong lowering of v4x64 shuffles into concat_vector plus extract_subvector nodes.
This patch fixes a bug in the shuffle lowering logic implemented by function
'lowerV2X128VectorShuffle'.

The are few cases where function 'lowerV2X128VectorShuffle' wrongly expands a
shuffle of two v4X64 vectors into a CONCAT_VECTORS of two EXTRACT_SUBVECTOR
nodes. The problematic expansion only occurs when the shuffle mask M has an
'undef' element at position 2, and M is equivalent to mask <0,1,4,5>.
In that case, the algorithm propagates the wrong vector to one of the two
new EXTRACT_SUBVECTOR nodes.

Example:
;;
define <4 x double> @test(<4 x double> %A, <4 x double> %B) {
entry:
  %0 = shufflevector <4 x double> %A, <4 x double> %B, <4 x i32><i32 undef, i32 1, i32 undef, i32 5>
  ret <4 x double> %0
}
;;

Before this patch, llc (-mattr=+avx) generated:
  vinsertf128 $1, %xmm0, %ymm0, %ymm0

With this patch, llc correctly generates:
  vinsertf128 $1, %xmm1, %ymm0, %ymm0

Added test lower-vec-shuffle-bug.ll

Differential Revision: http://reviews.llvm.org/D8259


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 17:29:49 +00:00
..
AArch64 [MachineCopyPropagation] Fix a bug causing incorrect removal for the instruction sequences as follows 2015-03-13 05:15:23 +00:00
ARM ARM: simplify and extend byval handling 2015-03-11 18:54:22 +00:00
BPF [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
Generic Unxfail passing test on Hexagon 2015-03-12 20:38:10 +00:00
Hexagon Remove unused complex patterns for addressing modes on Hexagon. 2015-03-12 16:44:50 +00:00
Inputs DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Mips [mips][microMIPS] Make usage of NOT16 by code generator 2015-03-11 20:28:31 +00:00
MSP430 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
NVPTX [NVPTXAsmPrinter] do not print .align on function headers 2015-03-12 01:50:30 +00:00
PowerPC Add support for part-word atomics for PPC 2015-03-10 20:51:07 +00:00
R600 R600/SI: Add test for min / max with immediate 2015-03-13 16:43:48 +00:00
SPARC Use the vanilla func_end symbol for .size. 2015-03-04 01:35:23 +00:00
SystemZ Change SystemZ large tests to use the existing long_tests property 2015-03-02 19:34:11 +00:00
Thumb DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Thumb2 Make DataLayout Non-Optional in the Module 2015-03-04 18:43:29 +00:00
WinEH Adding WinEHPrepare tests (currently XFAILs) 2015-03-12 21:32:59 +00:00
X86 [X86][AVX] Fix wrong lowering of v4x64 shuffles into concat_vector plus extract_subvector nodes. 2015-03-13 17:29:49 +00:00
XCore Reland r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation 2015-03-09 22:45:16 +00:00