llvm-6502/test/Transforms/InstSimplify/call-callconv.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

49 lines
1.5 KiB
LLVM

; RUN: opt < %s -instcombine -S | FileCheck %s
; Verify that the non-default calling conv doesn't prevent the libcall simplification
@.str = private unnamed_addr constant [4 x i8] c"abc\00", align 1
define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
; CHECK: _abs
%call = tail call arm_aapcscc i32 @abs(i32 %i) nounwind readnone
ret i32 %call
; CHECK: %[[ISPOS:.*]] = icmp sgt i32 %i, -1
; CHECK: %[[NEG:.*]] = sub i32 0, %i
; CHECK: %[[RET:.*]] = select i1 %[[ISPOS]], i32 %i, i32 %[[NEG]]
; CHECK: ret i32 %[[RET]]
}
declare arm_aapcscc i32 @abs(i32) nounwind readnone
define arm_aapcscc i32 @_labs(i32 %i) nounwind readnone {
; CHECK: _labs
%call = tail call arm_aapcscc i32 @labs(i32 %i) nounwind readnone
ret i32 %call
; CHECK: %[[ISPOS:.*]] = icmp sgt i32 %i, -1
; CHECK: %[[NEG:.*]] = sub i32 0, %i
; CHECK: %[[RET:.*]] = select i1 %[[ISPOS]], i32 %i, i32 %[[NEG]]
; CHECK: ret i32 %[[RET]]
}
declare arm_aapcscc i32 @labs(i32) nounwind readnone
define arm_aapcscc i32 @_strlen1() {
; CHECK: _strlen1
%call = tail call arm_aapcscc i32 @strlen(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0))
ret i32 %call
; CHECK: ret i32 3
}
declare arm_aapcscc i32 @strlen(i8*)
define arm_aapcscc zeroext i1 @_strlen2(i8* %str) {
; CHECK: _strlen2
%call = tail call arm_aapcscc i32 @strlen(i8* %str)
%cmp = icmp ne i32 %call, 0
ret i1 %cmp
; CHECK: %[[STRLENFIRST:.*]] = load i8, i8* %str
; CHECK: %[[CMP:.*]] = icmp ne i8 %[[STRLENFIRST]], 0
; CHECK: ret i1 %[[CMP]]
}