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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
45 lines
1.3 KiB
LLVM
45 lines
1.3 KiB
LLVM
; RUN: opt -basicaa -load-combine -instcombine -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare void @llvm.assume(i1) nounwind
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; 'load' before the 'call' gets optimized:
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define i64 @test1(i32* nocapture readonly %a, i1 %b) {
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; CHECK-LABEL: @test1
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; CHECK-DAG: load i64, i64* %1, align 4
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; CHECK-DAG: tail call void @llvm.assume(i1 %b)
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; CHECK: ret i64
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%load1 = load i32, i32* %a, align 4
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%conv = zext i32 %load1 to i64
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%arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1
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%load2 = load i32, i32* %arrayidx1, align 4
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tail call void @llvm.assume(i1 %b)
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%conv2 = zext i32 %load2 to i64
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%shl = shl nuw i64 %conv2, 32
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%add = or i64 %shl, %conv
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ret i64 %add
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}
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; 'call' before the 'load' doesn't get optimized:
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define i64 @test2(i32* nocapture readonly %a, i1 %b) {
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; CHECK-LABEL: @test2
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; CHECK-DAG: load i64, i64* %1, align 4
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; CHECK-DAG: tail call void @llvm.assume(i1 %b)
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; CHECK: ret i64
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%load1 = load i32, i32* %a, align 4
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%conv = zext i32 %load1 to i64
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%arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1
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tail call void @llvm.assume(i1 %b)
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%load2 = load i32, i32* %arrayidx1, align 4
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%conv2 = zext i32 %load2 to i64
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%shl = shl nuw i64 %conv2, 32
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%add = or i64 %shl, %conv
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ret i64 %add
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}
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