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Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
2.4 KiB
LLVM
50 lines
2.4 KiB
LLVM
; RUN: opt < %s -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; The parallel loop has been invalidated by the new memory accesses introduced
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; by reg2mem (Loop::isParallel() starts to return false). Ensure the loop is
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; now non-vectorizable.
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;CHECK-NOT: <4 x i32>
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define void @parallel_loop(i32* nocapture %a, i32* nocapture %b) nounwind uwtable {
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entry:
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%indvars.iv.next.reg2mem = alloca i64
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%indvars.iv.reg2mem = alloca i64
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%"reg2mem alloca point" = bitcast i32 0 to i32
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store i64 0, i64* %indvars.iv.reg2mem
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br label %for.body
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for.body: ; preds = %for.body.for.body_crit_edge, %entry
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%indvars.iv.reload = load i64, i64* %indvars.iv.reg2mem
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%arrayidx = getelementptr inbounds i32, i32* %b, i64 %indvars.iv.reload
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%0 = load i32, i32* %arrayidx, align 4, !llvm.mem.parallel_loop_access !3
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%arrayidx2 = getelementptr inbounds i32, i32* %a, i64 %indvars.iv.reload
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%1 = load i32, i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3
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%idxprom3 = sext i32 %1 to i64
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%arrayidx4 = getelementptr inbounds i32, i32* %a, i64 %idxprom3
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store i32 %0, i32* %arrayidx4, align 4, !llvm.mem.parallel_loop_access !3
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%indvars.iv.next = add i64 %indvars.iv.reload, 1
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; A new store without the parallel metadata here:
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store i64 %indvars.iv.next, i64* %indvars.iv.next.reg2mem
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%indvars.iv.next.reload1 = load i64, i64* %indvars.iv.next.reg2mem
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%arrayidx6 = getelementptr inbounds i32, i32* %b, i64 %indvars.iv.next.reload1
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%2 = load i32, i32* %arrayidx6, align 4, !llvm.mem.parallel_loop_access !3
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store i32 %2, i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3
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%indvars.iv.next.reload = load i64, i64* %indvars.iv.next.reg2mem
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%lftr.wideiv = trunc i64 %indvars.iv.next.reload to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 512
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br i1 %exitcond, label %for.end, label %for.body.for.body_crit_edge, !llvm.loop !3
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for.body.for.body_crit_edge: ; preds = %for.body
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%indvars.iv.next.reload2 = load i64, i64* %indvars.iv.next.reg2mem
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store i64 %indvars.iv.next.reload2, i64* %indvars.iv.reg2mem
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br label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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!3 = !{!3}
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