llvm-6502/test/MC
Saleem Abdulrasool 5e3c87ee1a ARM: add support for segment base relocations (SBREL)
This adds support for parsing and emitting the SBREL relocation variant for the
ARM target.  Handling this relocation variant is necessary for supporting the
full ARM ELF specification.  Addresses PR22128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-11 04:39:18 +00:00
..
AArch64
ARM ARM: add support for segment base relocations (SBREL) 2015-01-11 04:39:18 +00:00
AsmParser
COFF
Disassembler [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
ELF
Hexagon
MachO Add a test that would have found the issue in r224935. 2015-01-07 21:10:25 +00:00
Markup
Mips [mips][microMIPS] Relocate with symbol for micromips symbols 2014-12-30 22:04:16 +00:00
PowerPC [PowerPC] Add support for the CMPB instruction 2015-01-03 01:16:37 +00:00
R600 R600/SI: Add a stub GCNTargetMachine 2015-01-06 18:00:21 +00:00
Sparc
SystemZ
X86