llvm-6502/test
Jim Grosbach ced674e470 ARM: Use a dedicated intrinsic for vector bitwise select.
The expression based expansion too often results in IR level optimizations
splitting the intermediate values into separate basic blocks, preventing
the formation of the VBSL instruction as the code author intended. In
particular, LICM would often hoist part of the computation out of a loop.

rdar://11011471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:18:20 +00:00
..
Analysis
Archive
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen ARM: Use a dedicated intrinsic for vector bitwise select. 2012-09-21 00:18:20 +00:00
DebugInfo Only emit DW_AT_object_pointer if this is a definition. 2012-09-20 22:51:57 +00:00
ExecutionEngine
Feature
Instrumentation
Integer
Linker
MC Add support for macro parameters/arguments delimited by spaces, 2012-09-19 20:36:12 +00:00
Object
Other FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character after the colon. 2012-09-18 20:51:39 +00:00
Scripts
TableGen Re-work bit/bits value resolving in tblgen 2012-09-06 23:32:48 +00:00
Transforms SimplifyCFG: sink common codes from IF, ELSE blocks down to END block. 2012-09-20 22:37:36 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile yet another attempt at fixing @OCAMLOPT@ for sed. 2012-09-07 09:24:13 +00:00
Makefile.tests
TestRunner.sh