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https://github.com/c64scene-ar/llvm-6502.git
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5fd5b125ff
For example, on 32-bit architecture, don't promote all uses of the IV to 64-bits just because one use is a 64-bit cast. Alternate implementation of the patch by Arnaud de Grandmaison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127884 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.1 KiB
LLVM
43 lines
1.1 KiB
LLVM
; RUN: opt < %s -indvars -S > %t
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; RUN: not grep inttoptr %t
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; RUN: not grep ptrtoint %t
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; RUN: grep scevgep %t
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target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n:32:64"
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; Indvars shouldn't need inttoptr/ptrtoint to expand an address here.
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define void @foo(i8* %p) nounwind {
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entry:
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br i1 true, label %bb.nph, label %for.end
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for.cond:
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%phitmp = icmp slt i64 %inc, 20
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br i1 %phitmp, label %for.body, label %for.cond.for.end_crit_edge
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for.cond.for.end_crit_edge:
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br label %for.end
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bb.nph:
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br label %for.body
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for.body:
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%storemerge1 = phi i64 [ %inc, %for.cond ], [ 0, %bb.nph ]
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%call = tail call i64 @bar() nounwind
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%call2 = tail call i64 @car() nounwind
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%conv = trunc i64 %call2 to i8
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%conv3 = sext i8 %conv to i64
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%add = add nsw i64 %call, %storemerge1
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%add4 = add nsw i64 %add, %conv3
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%arrayidx = getelementptr inbounds i8* %p, i64 %add4
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store i8 0, i8* %arrayidx
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%inc = add nsw i64 %storemerge1, 1
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br label %for.cond
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for.end:
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ret void
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}
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declare i64 @bar()
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declare i64 @car()
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