llvm-6502/test/CodeGen
Bill Wendling d361a77f14 Create a more targeted fix for not sinking instructions into a range where it
will conflict with another live range. The place which creates this scenerio is
the code in X86 that lowers a select instruction by splitting the MBBs. This
eliminates the need to check from the bottom up in an MBB for live pregs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 23:46:31 +00:00
..
Alpha
ARM Remove the local register allocator. 2010-06-15 21:58:33 +00:00
Blackfin
CBackend
CellSPU Fix SPU to cope with vector insertelement to an undef position. 2010-06-09 09:58:17 +00:00
CPP
Generic Remove the local register allocator. 2010-06-15 21:58:33 +00:00
MBlaze
Mips
MSP430
PIC16
PowerPC Remove the local register allocator. 2010-06-15 21:58:33 +00:00
SPARC
SystemZ
Thumb Remove the local register allocator. 2010-06-15 21:58:33 +00:00
Thumb2 Remove the arm_aapcscc marker from the tests. It is the default 2010-06-15 19:04:29 +00:00
X86 Create a more targeted fix for not sinking instructions into a range where it 2010-06-15 23:46:31 +00:00
XCore